Application Notes for Clocks and Timers - Technical Documentation

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Title	Abstract	Type	Size (KB)	Date	Views
AN-1558 Clocking High-Speed A/D Converters (Rev. B)	Read Abstract	PDF	1166	01 May 2013	858
Use of the LMV112 to Reduce Ref Clk Interaction in Handheld Device (Rev. A)	Read Abstract	PDF	92	30 Apr 2013	504
HS Load/Line Transient Jigs and App Rpt for Testing POL Regulators	Read Abstract	PDF	1927	30 Apr 2013	458
AN-1821 CPRI Repeater System (Rev. A)	Read Abstract	PDF	1183	26 Apr 2013	1,273
High Speed ADCs with Interfacing, Driving and Clocking Schemes (Rev. A)	Read Abstract	PDF	178	26 Apr 2013	699
AN-1734 Using the LMK03000C to Clean Recovered Clocks (Rev. B)	Read Abstract	PDF	193	26 Apr 2013	935
AN-1865 Frequency Synthesis and Planning for PLL Architectures (Rev. C)	Read Abstract	PDF	173	26 Apr 2013	909
Phase Synchronization with Multiple Devices and Frequencies (Rev. A)	Read Abstract	PDF	199	26 Apr 2013	1,121
AN-1939 Crystal Based Oscillator Design with the LMK04000 Family (Rev. A)	Read Abstract	PDF	8194	26 Apr 2013	2,396
AN-1910 LMK04000 Family Phase Noise Characterization (Rev. A)	Read Abstract	PDF	135045	26 Apr 2013	396
AN-1879 Fractional N Frequency Synthesis (Rev. A)	Read Abstract	PDF	465	26 Apr 2013	1,378
Optimizing LMX243x Input Sens Using Simple Matching Techniques (Rev. A)	Read Abstract	PDF	361	26 Apr 2013	440
High Speed BUS LVDS Clock Distri Using DS92CK16 Clock Distri (Rev. B)	Read Abstract	PDF	412	26 Apr 2013	674
AN-694 A DMOS 3A, 55V, H-Bridge: The LMD18200 (Rev. C)	Read Abstract	PDF	604	26 Apr 2013	2,402
An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. B)	Read Abstract	PDF	131	26 Apr 2013	978
Designing an ATCA Compliant M-LVDS Clock Distribution Network (Rev. B)	Read Abstract	PDF	276	26 Apr 2013	932
AN-2108 Generating 44.1 kHz Based Clocks with the LMH1983 (Rev. A)	Read Abstract	PDF	17	26 Apr 2013	738
AN-2006 Synchronizing a DP83640 PTP Master to a GPS Receiver (Rev. A)	Read Abstract	PDF	35	26 Apr 2013	1,217
New Phase-Locked-Loops Have Advangs as Freq to Voltage Cnvrtrs (Rev. B)	Read Abstract	PDF	1314	26 Apr 2013	882
AN-1729 DP83640 IEEE 1588 PTP Synchronized Clock Output (Rev. D)	Read Abstract	PDF	209	26 Apr 2013	1,436
AN-1950 Silently Powering Low Noise Applications (Rev. A)	Read Abstract	PDF	10453	22 Apr 2013	1,325
Analysis & Perf Eval of Passive Fltr Design Techique for Charge Pump PLL's (Rev. B)	Read Abstract	PDF	529	11 Apr 2013	900
Driving the TLK10002 10Gpbs SERDES with the CDCM6208 Clock Generator	Read Abstract	PDF	1168	14 Dec 2012	880
A Step by Step Guide on Using the MSP430 as a Bootloader for the CDCM6208VxEVM (Rev. A)	Read Abstract	PDF	612	04 Dec 2012	938
How to measure Total Jitter (TJ) (Rev. A)	Read Abstract	PDF	6525	04 Dec 2012	1,146
LMK04828 as a clock source for the ADS42JB69	Read Abstract	PDF	1393	14 Nov 2012	668
Effects of Clock Noise on High Speed DAC Performance	Read Abstract	PDF	674	08 Nov 2012	1,080
Effects of Clock Spur on High Speed DAC Performance	Read Abstract	PDF	676	08 Nov 2012	744
Crystal Oscillator Performance of the CDCLVC1310	Read Abstract	PDF	273	09 Aug 2012	1,079
Semiconductor and IC Package Thermal Metrics (Rev. B)	Read Abstract	PDF	180	05 Jul 2012	5,026
VCXO Application Guideline for CDCE(L)9xx Family (Rev. A)	Read Abstract	PDF	107	23 Apr 2012	1,612
TRF3765 Synthesizer Lock Time	Read Abstract	PDF	448	06 Feb 2012	696
Phase Noise Performance of CDCLVC1310	Read Abstract	PDF	313	26 Jan 2012	933
TRF3765 REF_IN Impedance Application Note	Read Abstract	PDF	92	11 Jan 2012	548
TRF3765 Output Terminations	Read Abstract	PDF	248	04 Jan 2012	553
Low supply TRF3765 performance evaluation	Read Abstract	PDF	130	04 Jan 2012	529
TSW3085EVM ACPR and EVM Measurements	Read Abstract	PDF	2151	29 Dec 2011	1,905
Supply Noise Effect on Oscillator Phase Noise	Read Abstract	PDF	1187	22 Nov 2011	1,194
Clock jitter analyzed in the time domain, Part 3	Read Abstract	PDF	627	16 Sep 2011	1,098
3Q 2011 Issue Analog Applications Journal		PDF	1424	16 Sep 2011	967
Synchronizing Three or More UCC28950 Phase-Shifted, Full-Bridge Controllers	Read Abstract	PDF	650	13 Sep 2011	1,472
Журнал по применению аналоговых компонентов 3Q 2011		PDF	3921	01 Sep 2011	1,368
Phase Noise Performance and Loop Bandwidth Optimization of CDCE62005	Read Abstract	PDF	556	11 Aug 2011	851
TSW6011: Direct Down-Conversion System with IQ Correction and Impact on EVM	Read Abstract	PDF	3653	31 Jul 2011	2,228
How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock Buffer	Read Abstract	PDF	518	30 Nov 2010	716
Clock jitter analyzed in the time domain, Part 2		PDF	588	15 Nov 2010	716
4Q 2010 Issue Analog Applications Journal		PDF	1344	15 Nov 2010	911
Recommendation for Register-Related SPD Settings on DDR3 RDIMM (Rev. A)	Read Abstract	PDF	42	21 Sep 2010	698
Power Supply Rejection to Noise in Sinusoidal Clock Buffers: CDC3S04 (Rev. A)	Read Abstract	PDF	12778	21 Jun 2010	866
Using LVCMOS Input to the CDCM6100x	Read Abstract	PDF	66	23 May 2010	700
Using the CDC3S04	Read Abstract	PDF	110	18 Apr 2010	590
General I2C / EEPROM usage for the CDCE(L)9xx family	Read Abstract	PDF	40	26 Jan 2010	737
Programmable Yn Clock Phase Shift w/SN74SSQEA32882 DDR3 Register	Read Abstract	PDF	142	11 Jan 2010	560
Using The CDC7005 as a 1:5 PECL Buffer w/Programmable Divider Ratio (Rev. B)	Read Abstract	PDF	85	15 Dec 2009	516
DDR3 Register Input Bus Termination Measurement	Read Abstract	PDF	440	16 Nov 2009	741
TLK313x/CDCM7005 Multi-hop Performance	Read Abstract	PDF	2366	01 Nov 2009	636
Troubleshooting I2C Bus Protocol	Read Abstract	PDF	184	19 Oct 2009	3,198
TI Powers Altera's Arria II GX FPGA Development Kit		PDF	596	29 Sep 2009	931
Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913	Read Abstract	PDF	297	23 Sep 2009	643
Spread Spectrum Clocking Using the CDCS502/503	Read Abstract	PDF	181	19 Aug 2009	987
AN-97 Versatile Timer Operates from Microseconds to Hours (Rev. A)	Read Abstract	PDF	499	03 Aug 2009	693
Impact of sampling-clock spurs on ADC performance		PDF	1162	14 Jul 2009	1,821
Q3 2009 Issue Analog Applications Journal		Multiple Files		14 Jul 2009	1,361
CMR Programming for DDR3 Registers	Read Abstract	PDF	109	25 Jun 2009	550
DDR2 Memory Interface Clocks and Registers - Overview	Read Abstract	PDF	308	25 Mar 2009	708
Ethernet Clock Generation Using the CDCM6100x	Read Abstract	PDF	454	18 Feb 2009	1,061
Fibre Channel and SAN Clock Generation Using the CDCM6100x	Read Abstract	PDF	322	18 Feb 2009	629
CDCE62005 Application Report	Read Abstract	PDF	296	21 Nov 2008	973
LAN & WAN clock generation and muxing using the CDCE62005	Read Abstract	PDF	2906	19 Nov 2008	647
Overview of JEDEC RawCards for DDR3 RDIMM	Read Abstract	PDF	58	19 Sep 2008	632
Using the CDCE421 as a Frequency Synthesizer (Rev. C)	Read Abstract	PDF	250	12 Sep 2008	586
CDCE62005 Phase Noise and Jitter Cleaning Performance	Read Abstract	PDF	2486	05 Sep 2008	1,718
CDCE62005 as Clock Solution for High-Speed ADCs	Read Abstract	PDF	805	04 Sep 2008	1,287
CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters	Read Abstract	PDF	424	08 Jun 2008	1,413
Phase Noise Performance and Jitter Cleaning Ability of CDCE72010	Read Abstract	PDF	2261	02 Jun 2008	1,462
Using the CDCE72010 as a Frequency Synthesizer	Read Abstract	PDF	1054	31 May 2008	683
Application Examples for CDCUx877x PLL family	Read Abstract	PDF	97	07 May 2008	616
SN74SSQE32882ZALR Marking Information	Read Abstract	PDF	60	01 Apr 2008	555
Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency	Read Abstract	PDF	860	31 Mar 2008	1,263
Practical consideration on choosing a crystal for CDCE(L)9xx family	Read Abstract	PDF	60	24 Mar 2008	700
CDCx706/x906 Termination and Signal Integrity Guidelines (Rev. A)	Read Abstract	PDF	155	28 Nov 2007	906
Adaptive Speed Control for Automotive Systems	Read Abstract	PDF	324	20 Nov 2007	976
AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C)	Read Abstract	PDF	417	17 Oct 2007	1,209
Selecting Amplifiers, ADCs, and Clocks for High-Performance Signal Paths	Read Abstract	PDF	545	13 Sep 2007	796
Clocking Recommendations for DM6446 Digital Video EVM with Sngle PLL (Rev. A)	Read Abstract	PDF	94	08 Aug 2007	893
Generating Precision Clocks for Time- Interleaved ADCs	Read Abstract	PDF	680	02 Aug 2007	1,259
Delay Cal of Signal Path Intrcon In Remote Radio Head Bse stations & Other Apps	Read Abstract	PDF	629	02 Aug 2007	506
Timing is Everything Çô The Broadcast Video Signal Path	Read Abstract	PDF	539	02 Aug 2007	545
TRF3761 QFN Installation Using a Hakko Hot Air Rework Station	Read Abstract	PDF	38	07 Apr 2007	790
CDCL6010 as a Frequency Synthesizer and Jitter Cleaner	Read Abstract	PDF	585	14 Mar 2007	578
nFBGA Packaging Application Report	Read Abstract	PDF	3075	13 Mar 2007	991
High Speed Layout Guidelines	Read Abstract	PDF	765	30 Nov 2006	8,138
Clock Recommendations for the DM643x EVM	Read Abstract	PDF	121	29 Nov 2006	632
Recommended Terminations for the Differential Inputs of CDCE906/CDCE706	Read Abstract	PDF	84	10 Aug 2006	729
Using TI's CDCV304 w/Backplane Transceiver (TLK1201/1501/2201/2501/2701/3101) (Rev. A)	Read Abstract	PDF	220	20 Apr 2006	773
Basics of the CDC7005 Hold Function	Read Abstract	PDF	233	13 Apr 2006	532
Design Considerations for TI's CDCV857/CDCV857A/CDCV855 DRR PLL (Rev. A)	Read Abstract	PDF	362	20 Nov 2005	651
A General Guideline: How to Use the CDCF5801A for Phase Alignment/Adjustment (Rev. B)	Read Abstract	PDF	129	21 Oct 2005	1,278
Understanding High-Speed Signals, Clocks, and Data Capture	Read Abstract	PDF	1855	18 Oct 2005	765
Phase Noise/Phase Jitter Performance of CDCM7005	Read Abstract	PDF	1129	26 Jul 2005	951

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