Clock and Timing

Cross Reference

Application Notes

Tools & Software

Block Diagrams

WEBENCH® Design Center

High Speed Layout Guidelines (Rev. A)


This application report addresses high-speed signals, such as clock signals and their routing, and gives designers a review of the important coherences. With some simple rules, electromagnetic interference problems can be minimized without using complicated formulas and expensive simulation tools. Section 1 gives a short introduction to theory, while Section 2 focuses on practical PCB design rules. Either section can be read independently.