Interfacing High-Speed LVDS Outputs of the ADS527x/ADS524x
The ADS527x and ADS524x families of devices are high-performance octal/quad channel analog-to-digital converters, ideal for the highest system density. Serial low voltage differential signaling (LVDS) outputs reduce the number of I/O interfaces required, power and overall package size. These device families are rated to work from sampling rates of 20MSPS to 70MSPS, corresponding to data rates of 240Mbps to 840Mbps.
This application report illustrates the design of a simple deserializer that can be used for capture rates up to 360Mbps. We then discuss the design of a receiver that can reliably deserialize LVDS outputs all the way up to 840Mbps.