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Semiconductor Packing Material Electrostatic Discharge (ESD) Protection


Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV, as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays, tape and reel, and magazines. Additional units were subjected to the same discharge, without the protection of the packing material. Test results showed that the packing materials used by TI provide protection up to 20 kV, and that a level of ESD protection is required. The die in the components had a Charge Device Model (CDM) rating of 0.5 kV, and all units experiencing a discharge greater than 500 V sustained sufficient electrical overstress to fail electrical testing when outside of the packing materials.