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Spartan 6 Series


Power Requirements | Reference Designs


Power Requirements for Spartan-6 Series
  Pin Name Voltage (V) Imax* Tolerance Sequencing Order Timing Delay
Device (mA)
Core Vccint 1.21 XC6SLX4
XC6SLX9
XC6SLX16
XC6SLX25
XC6SLX25T
XC6SLX45
XC6SLX45T
XC6SLX100
XC6SLX100T
XC6SLX150
XC6SLX150T
300
500
500
600
600
800
800
1500
1500
3000
3000
±5% 1 Ramp Time (Vccint, Vcco, Vccaux) : 0.2 to 50ms (-1L is 0.2 to 40 ms)
I/O Vcco 1.2 / 1.5 / 1.8 / 2.5 / 3.3 X XC6SLX4
XC6SLX9
XC6SLX16
XC6SLX25
XC6SLX25T
XC6SLX45
XC6SLX45T
XC6SLX100
XC6SLX100T
XC6SLX150
XC6SLX150T
1000
1000
1000
1000
1000
1500
1500
2000
2000
3000
3000
±5%
I/O Vccaux 2.5 / 3.3 All Devices 2000
±5%

1) For the -L1 devices, the core voltage is 1.0V ± 5%
* NOTE: The value shown is the typical Imax, for your specific requirements please use the Xilinx power estimator http://www.xilinx.com/power as your Imax may be higher or lower based on your clock frequencies and particular usage.

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Reference Designs for Spartan-6 Series
Name File Name/Size Date Download
12V Input
This is a reference design using our Plug In Power DC to DC modules to power a Spartan 6 LX150 design using SLTA067 slta067.pdf, 86KB 2009
The SLVR340 is an intragrated FET design for a OMAP and Spartan 6 coprocessor board. slvr340a.pdf, 29KB 2008
The SLVR350 reference design is the same supply shipped with the Virtex 6 ML623 and Spartan 6 SP623 Rocket IO boards. slvr350.pdf, 335KB 09 Mar 2008
SLVR351 is the reference design for the Spartan 6 LX150 and features our Swift Intragrated FETS DC to DC converters slvr351.pdf, 305KB 28 May 2009

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