Clocks & timing

Clocks & timing – Design & development

Featured evaluation modules

LMK61E2EVM

Ultra-low jitter programmable oscillator evaluation module.

LMK03328EVM

Ultra-low-jitter clock generator EVM with 2 PLLs, 8 differential outputs and 2 inputs.

LMK04828BEVM

Ultra-low jitter synthesizer and jitter cleaner.

LMX2572EVM

6.4-GHz low-power wideband RF synthesizer with phase synchronization and JESD204B support.

LMX2492EVM

Ultra-low noise 14 GHz wideband RF PLL with ramp/chirp generation.

LMK61E2EVM

Ultra-low noise and low-power JESD204B-compliant dual-loop jitter cleaner.

LMK04610EVM

Ultra-low noise and low-power JESD204B-compliant dual-loop jitter cleaner.

Featured reference designs

EN55011 Ethernet brick.

AM3359 industrial communications engine.

Isolated current shunt and voltage measurement reference design for motor drives.

SDI video aggregation reference design.

DisplayPort video 4:1 aggregation reference design.

Equalization optimization of a JESD204B serial link reference design.

Featured software

Clock Architect

Create complete and optimized clock tree solutions in minutes.

Clock Design Tool

Design and simulate loop filters and device configurations.

TICS Pro Software

Program EVMs for PLLs+VCO, synthesizers and clocks.

PLLatinum™ Simulator

Create detailed designs and simulations of our LMX series of PLLs and synthesizers.