Design Rule Verification Report

Date:		5/16/2019
Time:		10:25:22 AM
Elapsed Time:		00:00:00
Filename:		E:\TI Work\1600W Server\Design Docs\V2\SR_Brd\SRBrd_PQ32-1.PcbDoc

Warnings:		0
Rule Violations:		151
Waived Violations:		1

Summary

Warnings	Count
Total	0

Rule Violations	Count
Clearance Constraint (Gap=0.3mm) (All),(All)	0
Short-Circuit Constraint (Allowed=No) (All),(All)	0
Short-Circuit Constraint (Allowed=Yes) (InNet('NetQ19_5') And OnLayer('Signal Layer 2')),(InNet('12Vs'))	0
Short-Circuit Constraint (Allowed=Yes) (InNet('NetQ15_5') And OnLayer('Signal Layer 1')),(InNet('12Vs') And OnLayer('Signal Layer 1'))	0
Un-Routed Net Constraint ( (All) )	0
Modified Polygon (Allow modified: No), (Allow shelved: No)	0
Width Constraint (Min=0.254mm) (Max=2mm) (Preferred=0.254mm) (All)	0
Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)	0
Hole Size Constraint (Min=0.0254mm) (Max=2.54mm) (All)	1
Hole To Hole Clearance (Gap=0.254mm) (All),(All)	3
Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)	6
Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)	138
Silk to Silk (Clearance=0.254mm) (All),(All)	0
Net Antennae (Tolerance=0mm) (All)	3
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)	0
Total	151

Waived Violations	Count
Clearance Constraint (Gap=0.3mm) (All),(All)	1
Total	1

Rule Violations

Hole Size Constraint (Min=0.0254mm) (Max=2.54mm) (All)
Hole Size Constraint: (14mm > 2.54mm) Pad Free-7(0mm,0mm) on Multi-Layer Actual Hole Size = 14mm

Hole To Hole Clearance (Gap=0.254mm) (All),(All)
Hole To Hole Clearance Constraint: (Collision < 0.254mm) Between Pad Free-11(-5.588mm,-11.56555mm) on Multi-Layer And Pad Free-15(-5.588mm,-11.56555mm) on Multi-Layer Pad/Via Touching Holes
Hole To Hole Clearance Constraint: (Collision < 0.254mm) Between Pad Free-11(-6.858mm,-11.56555mm) on Multi-Layer And Pad Free-15(-6.858mm,-11.56555mm) on Multi-Layer Pad/Via Touching Holes
Hole To Hole Clearance Constraint: (Collision < 0.254mm) Between Pad Free-12(-4.318mm,-11.56555mm) on Multi-Layer And Pad Free-15(-4.318mm,-11.56555mm) on Multi-Layer Pad/Via Touching Holes

Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)
Minimum Solder Mask Sliver Constraint: (0.1368mm < 0.254mm) Between Pad U10-1(1.5mm,-16.6mm) on Bottom Layer And Pad U10-2(0.85mm,-16.6mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.1368mm]
Minimum Solder Mask Sliver Constraint: (0.1368mm < 0.254mm) Between Pad U10-2(0.85mm,-16.6mm) on Bottom Layer And Pad U10-3(0.2mm,-16.6mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.1368mm]
Minimum Solder Mask Sliver Constraint: (0.1368mm < 0.254mm) Between Pad U10-3(0.2mm,-16.6mm) on Bottom Layer And Pad U10-4(-0.45mm,-16.6mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.1368mm]
Minimum Solder Mask Sliver Constraint: (0.1368mm < 0.254mm) Between Pad U10-5(-0.45mm,-13.8mm) on Bottom Layer And Pad U10-6(0.2mm,-13.8mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.1368mm]
Minimum Solder Mask Sliver Constraint: (0.1368mm < 0.254mm) Between Pad U10-6(0.2mm,-13.8mm) on Bottom Layer And Pad U10-7(0.85mm,-13.8mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.1368mm]
Minimum Solder Mask Sliver Constraint: (0.1368mm < 0.254mm) Between Pad U10-7(0.85mm,-13.8mm) on Bottom Layer And Pad U10-8(1.5mm,-13.8mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.1368mm]

Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C103-1(7.051mm,-17.229mm) on Top Layer And Track (6.051mm,-16.429mm)(6.051mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C103-1(7.051mm,-17.229mm) on Top Layer And Track (8.051mm,-16.429mm)(8.051mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.252mm < 0.254mm) Between Pad C103-2(7.051mm,-13.829mm) on Top Layer And Text "PQ32,1+1" (7.723mm,-12.9mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.252mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C103-2(7.051mm,-13.829mm) on Top Layer And Track (6.051mm,-16.429mm)(6.051mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C103-2(7.051mm,-13.829mm) on Top Layer And Track (8.051mm,-16.429mm)(8.051mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C47-1(-3.744mm,-13.829mm) on Top Layer And Track (-2.744mm,-16.429mm)(-2.744mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C47-1(-3.744mm,-13.829mm) on Top Layer And Track (-4.744mm,-16.429mm)(-4.744mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C47-2(-3.744mm,-17.229mm) on Top Layer And Track (-2.744mm,-16.429mm)(-2.744mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C47-2(-3.744mm,-17.229mm) on Top Layer And Track (-4.744mm,-16.429mm)(-4.744mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C72-1(2.733mm,-13.829mm) on Top Layer And Track (1.733mm,-16.429mm)(1.733mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C72-1(2.733mm,-13.829mm) on Top Layer And Track (3.733mm,-16.429mm)(3.733mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C72-2(2.733mm,-17.229mm) on Top Layer And Track (1.733mm,-16.429mm)(1.733mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C72-2(2.733mm,-17.229mm) on Top Layer And Track (3.733mm,-16.429mm)(3.733mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C73-1(4.892mm,-13.829mm) on Top Layer And Track (3.892mm,-16.429mm)(3.892mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C73-1(4.892mm,-13.829mm) on Top Layer And Track (5.892mm,-16.429mm)(5.892mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C73-2(4.892mm,-17.229mm) on Top Layer And Track (3.892mm,-16.429mm)(3.892mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C73-2(4.892mm,-17.229mm) on Top Layer And Track (5.892mm,-16.429mm)(5.892mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C74-1(-1.585mm,-13.829mm) on Top Layer And Track (-0.585mm,-16.429mm)(-0.585mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C74-1(-1.585mm,-13.829mm) on Top Layer And Track (-2.585mm,-16.429mm)(-2.585mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C74-2(-1.585mm,-17.229mm) on Top Layer And Track (-0.585mm,-16.429mm)(-0.585mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C74-2(-1.585mm,-17.229mm) on Top Layer And Track (-2.585mm,-16.429mm)(-2.585mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C75-1(0.574mm,-13.829mm) on Top Layer And Track (-0.426mm,-16.429mm)(-0.426mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C75-1(0.574mm,-13.829mm) on Top Layer And Track (1.574mm,-16.429mm)(1.574mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C75-2(0.574mm,-17.229mm) on Top Layer And Track (-0.426mm,-16.429mm)(-0.426mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C75-2(0.574mm,-17.229mm) on Top Layer And Track (1.574mm,-16.429mm)(1.574mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C76-1(11.369mm,-14.129mm) on Top Layer And Track (10.369mm,-16.729mm)(10.369mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C76-1(11.369mm,-14.129mm) on Top Layer And Track (12.369mm,-16.729mm)(12.369mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C76-2(11.369mm,-17.529mm) on Top Layer And Track (10.369mm,-16.729mm)(10.369mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C76-2(11.369mm,-17.529mm) on Top Layer And Track (12.369mm,-16.729mm)(12.369mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C77-1(9.21mm,-17.529mm) on Top Layer And Track (10.21mm,-16.729mm)(10.21mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C77-1(9.21mm,-17.529mm) on Top Layer And Track (8.21mm,-16.729mm)(8.21mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C77-2(9.21mm,-14.129mm) on Top Layer And Track (10.21mm,-16.729mm)(10.21mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C77-2(9.21mm,-14.129mm) on Top Layer And Track (8.21mm,-16.729mm)(8.21mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C78-1(-14.539mm,-17.229mm) on Top Layer And Track (-13.539mm,-16.429mm)(-13.539mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C78-1(-14.539mm,-17.229mm) on Top Layer And Track (-15.539mm,-16.429mm)(-15.539mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C78-2(-14.539mm,-13.829mm) on Top Layer And Track (-13.539mm,-16.429mm)(-13.539mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C78-2(-14.539mm,-13.829mm) on Top Layer And Track (-15.539mm,-16.429mm)(-15.539mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.12698mm < 0.254mm) Between Pad C79-1(-1.7mm,-12.4mm) on Bottom Layer And Track (-2.42355mm,-11.70912mm)(-1.7636mm,-11.70912mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12698mm]
Silk To Solder Mask Clearance Constraint: (0.12866mm < 0.254mm) Between Pad C79-1(-1.7mm,-12.4mm) on Bottom Layer And Track (-2.42355mm,-13.09256mm)(-1.7636mm,-13.09256mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12866mm]
Silk To Solder Mask Clearance Constraint: (0.13465mm < 0.254mm) Between Pad C79-1(-1.7mm,-12.4mm) on Bottom Layer And Track (-2.42355mm,-13.09256mm)(-2.42355mm,-11.70912mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.13465mm]
Silk To Solder Mask Clearance Constraint: (0.12698mm < 0.254mm) Between Pad C79-2(-0.1mm,-12.4mm) on Bottom Layer And Track (-0.0364mm,-11.70912mm)(0.62355mm,-11.70912mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12698mm]
Silk To Solder Mask Clearance Constraint: (0.12866mm < 0.254mm) Between Pad C79-2(-0.1mm,-12.4mm) on Bottom Layer And Track (-0.0364mm,-13.09256mm)(0.62355mm,-13.09256mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12866mm]
Silk To Solder Mask Clearance Constraint: (0.13465mm < 0.254mm) Between Pad C79-2(-0.1mm,-12.4mm) on Bottom Layer And Track (0.62355mm,-13.09256mm)(0.62355mm,-11.70912mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.13465mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C93-1(-8.062mm,-17.229mm) on Top Layer And Track (-7.062mm,-16.429mm)(-7.062mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C93-1(-8.062mm,-17.229mm) on Top Layer And Track (-9.062mm,-16.429mm)(-9.062mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C93-2(-8.062mm,-13.829mm) on Top Layer And Track (-7.062mm,-16.429mm)(-7.062mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C93-2(-8.062mm,-13.829mm) on Top Layer And Track (-9.062mm,-16.429mm)(-9.062mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C94-1(-5.903mm,-17.229mm) on Top Layer And Track (-4.903mm,-16.429mm)(-4.903mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C94-1(-5.903mm,-17.229mm) on Top Layer And Track (-6.903mm,-16.429mm)(-6.903mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C94-2(-5.903mm,-13.829mm) on Top Layer And Track (-4.903mm,-16.429mm)(-4.903mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C94-2(-5.903mm,-13.829mm) on Top Layer And Track (-6.903mm,-16.429mm)(-6.903mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C95-1(-12.38mm,-17.229mm) on Top Layer And Track (-11.38mm,-16.429mm)(-11.38mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C95-1(-12.38mm,-17.229mm) on Top Layer And Track (-13.38mm,-16.429mm)(-13.38mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C95-2(-12.38mm,-13.829mm) on Top Layer And Track (-11.38mm,-16.429mm)(-11.38mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C95-2(-12.38mm,-13.829mm) on Top Layer And Track (-13.38mm,-16.429mm)(-13.38mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C96-1(-10.221mm,-17.229mm) on Top Layer And Track (-11.221mm,-16.429mm)(-11.221mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C96-1(-10.221mm,-17.229mm) on Top Layer And Track (-9.221mm,-16.429mm)(-9.221mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C96-2(-10.221mm,-13.829mm) on Top Layer And Track (-11.221mm,-16.429mm)(-11.221mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C96-2(-10.221mm,-13.829mm) on Top Layer And Track (-9.221mm,-16.429mm)(-9.221mm,-14.629mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.22025mm < 0.254mm) Between Pad C99-1(13.528mm,-14.129mm) on Top Layer And Text "PQ32,1+1" (7.723mm,-12.9mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.22025mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C99-1(13.528mm,-14.129mm) on Top Layer And Track (12.528mm,-16.729mm)(12.528mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C99-1(13.528mm,-14.129mm) on Top Layer And Track (14.528mm,-16.729mm)(14.528mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C99-2(13.528mm,-17.529mm) on Top Layer And Track (12.528mm,-16.729mm)(12.528mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.23516mm < 0.254mm) Between Pad C99-2(13.528mm,-17.529mm) on Top Layer And Track (14.528mm,-16.729mm)(14.528mm,-14.929mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.23516mm]
Silk To Solder Mask Clearance Constraint: (0.22064mm < 0.254mm) Between Pad Q15-1(-11.43mm,-17.912mm) on Bottom Layer And Track (-11.335mm,-18.142mm)(-10.785mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.22064mm]
Silk To Solder Mask Clearance Constraint: (0.14067mm < 0.254mm) Between Pad Q15-1(-11.43mm,-17.912mm) on Bottom Layer And Track (-12.351mm,-18.142mm)(-11.801mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.14067mm]
Silk To Solder Mask Clearance Constraint: (0.10392mm < 0.254mm) Between Pad Q15-2(-12.7mm,-17.912mm) on Bottom Layer And Track (-11.335mm,-18.142mm)(-10.785mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.10391mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q15-2(-12.7mm,-17.912mm) on Bottom Layer And Track (-12.351mm,-18.142mm)(-11.801mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q15-2(-12.7mm,-17.912mm) on Bottom Layer And Track (-13.621mm,-18.142mm)(-13.071mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (0.18963mm < 0.254mm) Between Pad Q15-2(-12.7mm,-17.912mm) on Bottom Layer And Track (-14.891mm,-18.142mm)(-14.341mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18963mm]
Silk To Solder Mask Clearance Constraint: (0.18712mm < 0.254mm) Between Pad Q15-3(-13.97mm,-17.912mm) on Bottom Layer And Track (-13.621mm,-18.142mm)(-13.071mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18712mm]
Silk To Solder Mask Clearance Constraint: (0.14067mm < 0.254mm) Between Pad Q15-3(-13.97mm,-17.912mm) on Bottom Layer And Track (-14.891mm,-18.142mm)(-14.341mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.14067mm]
Silk To Solder Mask Clearance Constraint: (0.18712mm < 0.254mm) Between Pad Q15-4(-15.24mm,-17.912mm) on Bottom Layer And Track (-14.891mm,-18.142mm)(-14.341mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18712mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q15-4(-15.24mm,-17.912mm) on Bottom Layer And Track (-15.885mm,-18.142mm)(-15.335mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (0.22064mm < 0.254mm) Between Pad Q16-1(-5.207mm,-17.912mm) on Bottom Layer And Track (-5.112mm,-18.142mm)(-4.562mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.22064mm]
Silk To Solder Mask Clearance Constraint: (0.14067mm < 0.254mm) Between Pad Q16-1(-5.207mm,-17.912mm) on Bottom Layer And Track (-6.128mm,-18.142mm)(-5.578mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.14067mm]
Silk To Solder Mask Clearance Constraint: (0.10392mm < 0.254mm) Between Pad Q16-2(-6.477mm,-17.912mm) on Bottom Layer And Track (-5.112mm,-18.142mm)(-4.562mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.10391mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q16-2(-6.477mm,-17.912mm) on Bottom Layer And Track (-6.128mm,-18.142mm)(-5.578mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q16-2(-6.477mm,-17.912mm) on Bottom Layer And Track (-7.398mm,-18.142mm)(-6.848mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (0.18963mm < 0.254mm) Between Pad Q16-2(-6.477mm,-17.912mm) on Bottom Layer And Track (-8.668mm,-18.142mm)(-8.118mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18963mm]
Silk To Solder Mask Clearance Constraint: (0.18712mm < 0.254mm) Between Pad Q16-3(-7.747mm,-17.912mm) on Bottom Layer And Track (-7.398mm,-18.142mm)(-6.848mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18712mm]
Silk To Solder Mask Clearance Constraint: (0.14067mm < 0.254mm) Between Pad Q16-3(-7.747mm,-17.912mm) on Bottom Layer And Track (-8.668mm,-18.142mm)(-8.118mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.14067mm]
Silk To Solder Mask Clearance Constraint: (0.18712mm < 0.254mm) Between Pad Q16-4(-9.017mm,-17.912mm) on Bottom Layer And Track (-8.668mm,-18.142mm)(-8.118mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18712mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q16-4(-9.017mm,-17.912mm) on Bottom Layer And Track (-9.662mm,-18.142mm)(-9.112mm,-18.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (0.14067mm < 0.254mm) Between Pad Q19-1(8.636mm,-17.653mm) on Bottom Layer And Track (7.715mm,-17.883mm)(8.265mm,-17.883mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.14067mm]
Silk To Solder Mask Clearance Constraint: (0.22064mm < 0.254mm) Between Pad Q19-1(8.636mm,-17.653mm) on Bottom Layer And Track (8.731mm,-17.883mm)(9.281mm,-17.883mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.22064mm]
Silk To Solder Mask Clearance Constraint: (0.18963mm < 0.254mm) Between Pad Q19-2(7.366mm,-17.653mm) on Bottom Layer And Track (5.175mm,-17.883mm)(5.725mm,-17.883mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18963mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q19-2(7.366mm,-17.653mm) on Bottom Layer And Track (6.445mm,-17.883mm)(6.995mm,-17.883mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q19-2(7.366mm,-17.653mm) on Bottom Layer And Track (7.715mm,-17.883mm)(8.265mm,-17.883mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (0.10392mm < 0.254mm) Between Pad Q19-2(7.366mm,-17.653mm) on Bottom Layer And Track (8.731mm,-17.883mm)(9.281mm,-17.883mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.10391mm]
Silk To Solder Mask Clearance Constraint: (0.14067mm < 0.254mm) Between Pad Q19-3(6.096mm,-17.653mm) on Bottom Layer And Track (5.175mm,-17.883mm)(5.725mm,-17.883mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.14067mm]
Silk To Solder Mask Clearance Constraint: (0.18712mm < 0.254mm) Between Pad Q19-3(6.096mm,-17.653mm) on Bottom Layer And Track (6.445mm,-17.883mm)(6.995mm,-17.883mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18712mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q19-4(4.826mm,-17.653mm) on Bottom Layer And Track (4.181mm,-17.883mm)(4.731mm,-17.883mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (0.18712mm < 0.254mm) Between Pad Q19-4(4.826mm,-17.653mm) on Bottom Layer And Track (5.175mm,-17.883mm)(5.725mm,-17.883mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18712mm]
Silk To Solder Mask Clearance Constraint: (0.14067mm < 0.254mm) Between Pad Q20-1(14.8185mm,-17.611mm) on Bottom Layer And Track (13.8975mm,-17.841mm)(14.4475mm,-17.841mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.14067mm]
Silk To Solder Mask Clearance Constraint: (0.22064mm < 0.254mm) Between Pad Q20-1(14.8185mm,-17.611mm) on Bottom Layer And Track (14.9135mm,-17.841mm)(15.4635mm,-17.841mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.22064mm]
Silk To Solder Mask Clearance Constraint: (0.18963mm < 0.254mm) Between Pad Q20-2(13.5485mm,-17.611mm) on Bottom Layer And Track (11.3575mm,-17.841mm)(11.9075mm,-17.841mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18963mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q20-2(13.5485mm,-17.611mm) on Bottom Layer And Track (12.6275mm,-17.841mm)(13.1775mm,-17.841mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q20-2(13.5485mm,-17.611mm) on Bottom Layer And Track (13.8975mm,-17.841mm)(14.4475mm,-17.841mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (0.10392mm < 0.254mm) Between Pad Q20-2(13.5485mm,-17.611mm) on Bottom Layer And Track (14.9135mm,-17.841mm)(15.4635mm,-17.841mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.10392mm]
Silk To Solder Mask Clearance Constraint: (0.14067mm < 0.254mm) Between Pad Q20-3(12.2785mm,-17.611mm) on Bottom Layer And Track (11.3575mm,-17.841mm)(11.9075mm,-17.841mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.14067mm]
Silk To Solder Mask Clearance Constraint: (0.18712mm < 0.254mm) Between Pad Q20-3(12.2785mm,-17.611mm) on Bottom Layer And Track (12.6275mm,-17.841mm)(13.1775mm,-17.841mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18712mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad Q20-4(11.0085mm,-17.611mm) on Bottom Layer And Track (10.3635mm,-17.841mm)(10.9135mm,-17.841mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (0.18712mm < 0.254mm) Between Pad Q20-4(11.0085mm,-17.611mm) on Bottom Layer And Track (11.3575mm,-17.841mm)(11.9075mm,-17.841mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.18712mm]
Silk To Solder Mask Clearance Constraint: (0.24mm < 0.254mm) Between Pad R84-1(3mm,-13.6mm) on Bottom Layer And Track (2.2mm,-13.725mm)(2.2mm,-13.525mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.24mm]
Silk To Solder Mask Clearance Constraint: (0.13465mm < 0.254mm) Between Pad R84-1(3mm,-13.6mm) on Bottom Layer And Track (2.30744mm,-12.87645mm)(3.69088mm,-12.87645mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.13465mm]
Silk To Solder Mask Clearance Constraint: (0.12866mm < 0.254mm) Between Pad R84-1(3mm,-13.6mm) on Bottom Layer And Track (2.30744mm,-13.5364mm)(2.30744mm,-12.87645mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12866mm]
Silk To Solder Mask Clearance Constraint: (0.24mm < 0.254mm) Between Pad R84-1(3mm,-13.6mm) on Bottom Layer And Track (2mm,-13.525mm)(2.2mm,-13.525mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.24mm]
Silk To Solder Mask Clearance Constraint: (0.12698mm < 0.254mm) Between Pad R84-1(3mm,-13.6mm) on Bottom Layer And Track (3.69088mm,-13.5364mm)(3.69088mm,-12.87645mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12698mm]
Silk To Solder Mask Clearance Constraint: (0.24382mm < 0.254mm) Between Pad R84-2(3mm,-15.2mm) on Bottom Layer And Track (2.2mm,-16.875mm)(2.2mm,-15.75mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.24382mm]
Silk To Solder Mask Clearance Constraint: (0.12866mm < 0.254mm) Between Pad R84-2(3mm,-15.2mm) on Bottom Layer And Track (2.30744mm,-15.92355mm)(2.30744mm,-15.2636mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12866mm]
Silk To Solder Mask Clearance Constraint: (0.13465mm < 0.254mm) Between Pad R84-2(3mm,-15.2mm) on Bottom Layer And Track (2.30744mm,-15.92355mm)(3.69088mm,-15.92355mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.13465mm]
Silk To Solder Mask Clearance Constraint: (0.12698mm < 0.254mm) Between Pad R84-2(3mm,-15.2mm) on Bottom Layer And Track (3.69088mm,-15.92355mm)(3.69088mm,-15.2636mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12698mm]
Silk To Solder Mask Clearance Constraint: (0.12698mm < 0.254mm) Between Pad R86-1(-2.4mm,-14.2mm) on Bottom Layer And Track (-1.70912mm,-14.1364mm)(-1.70912mm,-13.47645mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12698mm]
Silk To Solder Mask Clearance Constraint: (0.13465mm < 0.254mm) Between Pad R86-1(-2.4mm,-14.2mm) on Bottom Layer And Track (-3.09256mm,-13.47645mm)(-1.70912mm,-13.47645mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.13465mm]
Silk To Solder Mask Clearance Constraint: (0.12866mm < 0.254mm) Between Pad R86-1(-2.4mm,-14.2mm) on Bottom Layer And Track (-3.09256mm,-14.1364mm)(-3.09256mm,-13.47645mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12866mm]
Silk To Solder Mask Clearance Constraint: (0.12698mm < 0.254mm) Between Pad R86-2(-2.4mm,-15.8mm) on Bottom Layer And Track (-1.70912mm,-16.52355mm)(-1.70912mm,-15.8636mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12698mm]
Silk To Solder Mask Clearance Constraint: (0.13465mm < 0.254mm) Between Pad R86-2(-2.4mm,-15.8mm) on Bottom Layer And Track (-3.09256mm,-16.52355mm)(-1.70912mm,-16.52355mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.13465mm]
Silk To Solder Mask Clearance Constraint: (0.12866mm < 0.254mm) Between Pad R86-2(-2.4mm,-15.8mm) on Bottom Layer And Track (-3.09256mm,-16.52355mm)(-3.09256mm,-15.8636mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12866mm]
Silk To Solder Mask Clearance Constraint: (0.12698mm < 0.254mm) Between Pad R88-1(-2.2mm,-17.9mm) on Bottom Layer And Track (-2.92355mm,-17.20912mm)(-2.2636mm,-17.20912mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12698mm]
Silk To Solder Mask Clearance Constraint: (0.12866mm < 0.254mm) Between Pad R88-1(-2.2mm,-17.9mm) on Bottom Layer And Track (-2.92355mm,-18.59256mm)(-2.2636mm,-18.59256mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12866mm]
Silk To Solder Mask Clearance Constraint: (0.13465mm < 0.254mm) Between Pad R88-1(-2.2mm,-17.9mm) on Bottom Layer And Track (-2.92355mm,-18.59256mm)(-2.92355mm,-17.20912mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.13465mm]
Silk To Solder Mask Clearance Constraint: (0.13465mm < 0.254mm) Between Pad R88-2(-0.6mm,-17.9mm) on Bottom Layer And Track (0.12355mm,-18.59256mm)(0.12355mm,-17.20912mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.13465mm]
Silk To Solder Mask Clearance Constraint: (0.12698mm < 0.254mm) Between Pad R88-2(-0.6mm,-17.9mm) on Bottom Layer And Track (-0.5364mm,-17.20912mm)(0.12355mm,-17.20912mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12698mm]
Silk To Solder Mask Clearance Constraint: (0.12866mm < 0.254mm) Between Pad R88-2(-0.6mm,-17.9mm) on Bottom Layer And Track (-0.5364mm,-18.59256mm)(0.12355mm,-18.59256mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12866mm]
Silk To Solder Mask Clearance Constraint: (0.12866mm < 0.254mm) Between Pad R89-1(2.6mm,-17.9mm) on Bottom Layer And Track (2.6636mm,-17.20744mm)(3.32355mm,-17.20744mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12866mm]
Silk To Solder Mask Clearance Constraint: (0.12698mm < 0.254mm) Between Pad R89-1(2.6mm,-17.9mm) on Bottom Layer And Track (2.6636mm,-18.59088mm)(3.32355mm,-18.59088mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12698mm]
Silk To Solder Mask Clearance Constraint: (0.13465mm < 0.254mm) Between Pad R89-1(2.6mm,-17.9mm) on Bottom Layer And Track (3.32355mm,-18.59088mm)(3.32355mm,-17.20744mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.13465mm]
Silk To Solder Mask Clearance Constraint: (0.12866mm < 0.254mm) Between Pad R89-2(1mm,-17.9mm) on Bottom Layer And Track (0.27645mm,-17.20744mm)(0.9364mm,-17.20744mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12866mm]
Silk To Solder Mask Clearance Constraint: (0.13465mm < 0.254mm) Between Pad R89-2(1mm,-17.9mm) on Bottom Layer And Track (0.27645mm,-18.59088mm)(0.27645mm,-17.20744mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.13465mm]
Silk To Solder Mask Clearance Constraint: (0.12698mm < 0.254mm) Between Pad R89-2(1mm,-17.9mm) on Bottom Layer And Track (0.27645mm,-18.59088mm)(0.9364mm,-18.59088mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.12698mm]
Silk To Solder Mask Clearance Constraint: (0.24047mm < 0.254mm) Between Pad U10-1(1.5mm,-16.6mm) on Bottom Layer And Track (1.925mm,-16.875mm)(2.2mm,-16.875mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.24047mm]
Silk To Solder Mask Clearance Constraint: (0.23918mm < 0.254mm) Between Pad U10-2(0.85mm,-16.6mm) on Bottom Layer And Track (0.27645mm,-17.20744mm)(0.9364mm,-17.20744mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.23918mm]
Silk To Solder Mask Clearance Constraint: (0.24086mm < 0.254mm) Between Pad U10-3(0.2mm,-16.6mm) on Bottom Layer And Track (0.12355mm,-18.59256mm)(0.12355mm,-17.20912mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.24086mm]
Silk To Solder Mask Clearance Constraint: (0.25322mm < 0.254mm) Between Pad U10-3(0.2mm,-16.6mm) on Bottom Layer And Track (0.27645mm,-17.20744mm)(0.9364mm,-17.20744mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.25322mm]
Silk To Solder Mask Clearance Constraint: (0.25322mm < 0.254mm) Between Pad U10-3(0.2mm,-16.6mm) on Bottom Layer And Track (0.27645mm,-18.59088mm)(0.27645mm,-17.20744mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.25322mm]
Silk To Solder Mask Clearance Constraint: (0.24086mm < 0.254mm) Between Pad U10-3(0.2mm,-16.6mm) on Bottom Layer And Track (-0.5364mm,-17.20912mm)(0.12355mm,-17.20912mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.24086mm]
Silk To Solder Mask Clearance Constraint: (0.24086mm < 0.254mm) Between Pad U10-4(-0.45mm,-16.6mm) on Bottom Layer And Track (-0.5364mm,-17.20912mm)(0.12355mm,-17.20912mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.24086mm]

Net Antennae (Tolerance=0mm) (All)
Net Antennae: Track (12mm,-21.5mm)(12mm,-19.69367mm) on Signal Layer 2
Net Antennae: Track (5.17512mm,-18.825mm)(6.25012mm,-19.9mm) on Bottom Layer
Net Antennae: Track (6mm,-21.5mm)(6mm,-19.64988mm) on Signal Layer 2

Waived Violations

Clearance Constraint (Gap=0.3mm) (All),(All)
Clearance Constraint: (Collision < 0.3mm) Between Arc (0mm,0mm) on Keep-Out Layer And Pad Free-7(0mm,0mm) on Multi-Layer Waived by Desheng Guo at 5/15/2019 9:26:13 PM