Krishnasawamy has been looking at technology and asking the question “How can I do this better?” for as long as he can remember. When something grabs his interest, he ponders it with intense focus. And that focus drives him to make improvements, leading to enhanced performance from TI’s chips.

Krishnasawamy is naturally competitive and has been that way since he was young. Inspiration comes from many sources: from hearing about a customer problem, reading about a new circuit or learning about an application at work. And his competitive nature has led to the belief that there is always a better solution.

This competitive streak has clearly worked for him. It motivated him to get a Ph.D. It drove him to create a new algorithm for successive-approximation-register (SAR) analog-to-digital conversions that now saves power and eliminates a previous speed issue. It inspired him to design a 700-megasamples-per-second six-bit A/D converter for a read channel in CMOS when the fastest previous best was 400, breaking through a bottleneck in the design of high-speed read channels. And it fueled him to set a standard that is used widely across the world today for a 52-megasamples-per-second parallel-pipelined A/D converter, a technique for limiting CMOS pipelines.

But Krishnasawamy believes his biggest achievements are yet to come. He’s committed to mentoring young engineers at TI so they in turn can produce TI’s future advances after he retires. And he believes this will enable an even greater and longer-term impact on innovation at TI than his 55-plus patents or his technology breakthroughs.