Clock generators/synthesizers, jitter cleaners and oscillator ICs
Improve performance, reduce system cost

Texas Instruments offers a broad selection of highly integrated PLL-based clock generators, synthesizers, jitter cleaners and oscillator ICs. Delivering best-in-class jitter performance and wide output frequency range with highly integrated fan-out buffers, these products serve a variety of clocking needs across the communications, consumer and industrial markets and are ideal clock tree solutions for driving DSPs, ASICs, high-speed ADCs, DACs, and various high-speed interface applications.
Improve performance, reduce system cost - Texas Instruments  
Clock generators
Device Description
CDCS502 Crystal oscillator/ clock generator with optional SSC
CDCS503 Clock buffer/clock multiplier with optional SSC
CDCE949 Programmable 4 PLL VCXO clock synthesizer with 1.8-V, 2.5-V, 3.3-V LVCMOS output
CDCE913 Programmable 1 PLL VCXO clock synthesizer with 1.8-V, 2.5-V, 3.3-V outputs
CDCE906 Programmable 3 PLL clock synthesizer/multiplier/divider
Precision clock generators/jitter cleaners
Device Description
CDCE62005 5/10-output clock generator/jitter cleaner with integrated dual VCO
CDCM61004 1:4 Ultra-low jitter crystal-in clock generator
CDCE72010 10-Outputs, low-jitter clock synchronizer and jitter cleaner
Oscillator ICs
Device Description
CDCM61001 1:1 Ultra-low jitter in crystal-in clock generator
CDCE421 Fully integrated, wide range, low jitter, crystal-oscillator clock generator
CDCE949 Programmable 4-PLL VCXO clock synthesizer with 1.8-V, 2.5-V, 3.3-V LVCMOS output
Applications:
  • Wireless base station
  • Data communication
  • Digital media systems
  • Medical/test equipment

Guide

Clocks and Timing Selection Guide Clocks and Timing Selection Guide
(.pdf, 776 KB)
Download

Application Notes

  • Ethernet clock generation using CDCM6100x
    (.pdf, 456 KB)
    February 2009
    Download
  • Using the CDCE62005 as a frequency synthesizer
    (.pdf, 300 KB)
    November 2008
    Download
  • VCXO application guideline for CDCE(L)9xx family
    (.pdf, 128 KB)
    June 2007
    Download
  • Clocking recommendations for DM6446 digital video EVM with single PLL
    (.pdf, 96 KB)
    August 2007
    Download