SBAS446H December   2009  – February 2016 ADS1282-HT

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Recommended Operating Conditions
    3. 7.3  Thermal Information
    4. 7.4  Electrical Characteristics
    5. 7.5  Electrical Characteristics (PW Package)
    6. 7.6  Timing Requirements
    7. 7.7  Pulse-Sync Timing Requirements
    8. 7.8  Reset Timing Requirements
    9. 7.9  Switching Characteristics
    10. 7.10 Modulator Switching Characteristics
    11. 7.11 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Noise Performance
      2. 8.3.2  Input-Referred Noise
      3. 8.3.3  Idle Tones
      4. 8.3.4  Operating Mode
      5. 8.3.5  Analog Inputs and Multiplexer
      6. 8.3.6  PGA (Programmable Gain Amplifier)
      7. 8.3.7  ADC
      8. 8.3.8  Modulator
      9. 8.3.9  Modulator Over-Range
      10. 8.3.10 Modulator Input Impedance
      11. 8.3.11 Modulator Over-Range Detection (MFLAG)
      12. 8.3.12 Voltage Reference Inputs (VREFP, VREFN)
      13. 8.3.13 Digital Filter
        1. 8.3.13.1 Sinc Filter Stage (Sinx/X)
        2. 8.3.13.2 FIR Stage
        3. 8.3.13.3 Group Delay and Step Response
          1. 8.3.13.3.1 Linear Phase Response
          2. 8.3.13.3.2 Minimum Phase Response
        4. 8.3.13.4 HPF Stage
      14. 8.3.14 Master Clock Input (CLK)
      15. 8.3.15 Synchronization (SYNC Pin and Sync Command)
      16. 8.3.16 Pulse-Sync Mode
      17. 8.3.17 Continuous-Sync Mode
      18. 8.3.18 Reset (RESET Pin and Reset Command)
      19. 8.3.19 Power-Down (PWDN Pin and Standby Command)
      20. 8.3.20 Power-On Sequence
      21. 8.3.21 Serial Interface
        1. 8.3.21.1 Serial Clock (SCLK)
        2. 8.3.21.2 Data Input (DIN)
        3. 8.3.21.3 Data Output (DOUT)
        4. 8.3.21.4 Data Ready (DRDY)
      22. 8.3.22 Data Format
      23. 8.3.23 Reading Data
        1. 8.3.23.1 Read Data Continuous
        2. 8.3.23.2 Read Data by Command
      24. 8.3.24 One-Shot Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Modulator Output Mode
    5. 8.5 Programming
      1. 8.5.1 Commands
        1. 8.5.1.1  WAKEUP: Wake-Up from Standby Mode
        2. 8.5.1.2  STANDBY: Standby Mode
        3. 8.5.1.3  SYNC: Synchronize the A/D Conversion
        4. 8.5.1.4  RESET: Reset the Device
        5. 8.5.1.5  RDATAC: Read Data Continuous
        6. 8.5.1.6  SDATAC: Stop Read Data Continuous
        7. 8.5.1.7  RDATA: Read Data By Command
        8. 8.5.1.8  RREG: Read Register Data
        9. 8.5.1.9  WREG: Write to Register
        10. 8.5.1.10 OFSCAL: Offset Calibration
        11. 8.5.1.11 GANCAL: Gain Calibration
      2. 8.5.2 Calibration Commands
        1. 8.5.2.1 OFSCAL Command
        2. 8.5.2.2 GANCAL Command
      3. 8.5.3 User Calibration
      4. 8.5.4 Configuration Guide
    6. 8.6 Register Maps
      1. 8.6.1 ADS1282-HT Register Map Information
      2. 8.6.2 ID Register
      3. 8.6.3 Configuration Registers
        1. 8.6.3.1 Configuration Register 0
        2. 8.6.3.2 Configuration Register 1
      4. 8.6.4 HPF1 and HPF0
        1. 8.6.4.1 High-Pass Filter Corner Frequency, Low Byte
        2. 8.6.4.2 High-Pass Filter Corner Frequency, High Byte
      5. 8.6.5 OFC2, OFC1, OFC0
        1. 8.6.5.1 Offset Calibration, Low Byte
        2. 8.6.5.2 Offset Calibration, Mid Byte
        3. 8.6.5.3 Offset Calibration, High Byte
      6. 8.6.6 FSC2, FSC1, FSC0
        1. 8.6.6.1 Full-Scale Calibration, Low Byte
        2. 8.6.6.2 Full-Scale Calibration, Mid Byte
        3. 8.6.6.3 Full-Scale Calibration, High Byte
      7. 8.6.7 Offset and Full-Scale Calibration Registers
        1. 8.6.7.1 OFC[2:0] Registers
        2. 8.6.7.2 FSC[2:0] Registers
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Geophone Interface Typical Application
        1. 9.2.1.1 Detailed Design Procedure
      2. 9.2.2 Digital Connection to a Field Programmable Gate Array (FPGA) Device Typical Application
        1. 9.2.2.1 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 HPF Transfer Function
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • High Resolution: 124-dB SNR (1000 SPS)
  • High Accuracy: THD: –102 dB
    INL: 0.5 ppm
  • Low-Noise PGA
  • Two-Channel Input MUX
  • Inherently-Stable Modulator With Fast Responding Over-Range Detection
  • Flexible Digital Filter:
    • Sinc + FIR + IIR (Selectable)
    • Linear or Minimum Phase Response
    • Programmable High-Pass Filter
    • Selectable FIR Data Rates: 250 SPS to 4 kSPS
  • Filter Bypass Option
  • Low-Power Consumption: 25 mW (210°C)
  • Offset and Gain Calibration Engine
  • SYNC Input
  • Analog Supply: Unipolar (5 V) or Bipolar (±2.5 V)
  • Digital Supply: 1.75 to 3.3 V
  • Supports Extreme Temperature Applications (1)
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extreme (–55°C to 210°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
(1)
(1)Texas Instruments high temperature products use highly optimized silicon (die) solutions with design and process enhancements to maximize performance over extended temperatures.

2 Applications

  • Energy Exploration
  • Seismic Monitoring
  • High-Accuracy Instrumentation
  • Down-Hole Drilling
  • High Temperature Environments

3 Description

The ADS1282-HT device is an extremely high-performance, single-chip analog-to-digital converter (ADC) with an integrated, low-noise programmable gain amplifier (PGA) and two-channel input multiplexer (MUX). The ADS1282-HT device is suitable for the demanding needs of energy exploration and seismic monitoring environments.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
ADS1282-HT CDIP SB (28) 7.49 mm × 35.56 mm
TSSOP (28) 4.40 mm × 9.70 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

ADS1282-HT fbd_bas418.gif