SBAS861B August   2017  – July 2019 AFE4900

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
    1.     Simplified Block Diagram
  4. 4Revision History
  5. 5Device and Documentation Support
    1. 5.1 Receiving Notification of Documentation Updates
    2. 5.2 Community Resources
    3. 5.3 Trademarks
    4. 5.4 Electrostatic Discharge Caution
    5. 5.5 Glossary
  6. 6Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YZ|30
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Synchronized PPG, ECG signal acquisition at data rates up to 1 kHz
  • ECG signal chain:
    • Standalone ECG acquisition up to 4 kHz
    • Input bias: 1-lead ECG with RLD bias
    • Programmable INA gain: 2.15 to 12.92
    • Input noise (1 Hz to 150 Hz): 2.5 µVrms at 1 kHz, 1.25 µVrms at 4-kHz data rate
    • AC, DC lead-off detect: 12.5-nA to 100-nA
    • IEC 60601 Test report available on request
  • PPG receiver:
    • Supports three time-multiplexed PD inputs
    • 24-Bit representation of current from PD
    • DC offset subtraction DAC (Up to ±126-µA) at TIA input for each LED, ambient
    • Digital ambient subtraction at ADC output
    • Noise filtering with programmable bandwidth
    • Transimpedance gain: 10 kΩ to 2 MΩ
    • Dynamic range up to 100 dB
    • Receiver operates in PPG-only mode at approximately 1-μA/Hz sampling rate
    • Power-down mode: approximately 0 μA
  • PPG transmitter:
    • Four LEDs in common anode configuration
    • 8-Bit LED current up to 200 mA
    • Mode to fire two LEDs in parallel
    • Programmable LED on-time
    • Simultaneous support of three LEDs for SpO2, or multiwavelength HRM
    • Average current of 30 μA adequate for a
      typical heart-rate monitoring scenario:
      • 20-mA Setting, 60-μs pulse duration,
        25-Hz sampling rate
  • Clocking using an external or internal clock
  • FIFO with 128-sample depth for ECG and PPG
  • I2C, SPI interfaces: selectable by pin
  • 2.6-mm × 2.1-mm, 0.4-mm Pitch DSBGA package
  • Supplies:
    • Rx: 1.8 V to 1.9 V (LDO bypass),
      2.0 V to 3.6 V (LDO enabled)
    • Tx: 3 V to 5.25 V
    • IO: 1.7 V to Rx_SUP