SBAS880A August   2017  – April 2018 AFE58JD32

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
    1.     Device Images
      1.      Simplified Block Diagram
  4. 4Revision History
  5. 5Description (continued)
  6. 6Device and Documentation Support
    1. 6.1 Documentation Support
      1. 6.1.1 Related Documentation
    2. 6.2 Receiving Notification of Documentation Updates
    3. 6.3 Community Resources
    4. 6.4 Trademarks
    5. 6.5 Electrostatic Discharge Caution
    6. 6.6 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Tray Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • 32-Channel, AFE for Ultrasound Applications:
    • Input Attenuator, LNA, LPF, ADC,
      Digital I/Q Demodulator and CW Mixer
    • Digital Time Gain Compensation (DTGC)
    • Total Gain Range: 12 dB to 51 dB
    • Linear Input Range: 800 mVPP
  • Input Attenuator With DTGC:
    • 8-dB to 0-dB Attenuation With 0.125-dB Step
    • Supports Matched Impedance for:
      • 50-Ω to 800-Ω Source Impedance
  • Low-Noise Amplifier (LNA) With DTGC:
    • 20-dB to 51-dB Gain With 0.125-dB Step
    • Low Input Current Noise: 1.2 pA/√Hz
  • 3rd-Order, Linear-Phase, Low-Pass Filter (LPF):
    • 5 MHz, 7.5 MHz, 10 MHz, and 12.5 MHz
  • 16 ADCs Converting at 12-Bit, 80 MSPS or 10-bit, 100 MSPS:
    • Each ADC Converts Two Sets of Inputs at Half Rate
    • 12-Bit ADC: 72-dBFS SNR
    • 10-Bit ADC: 61-dBFS SNR
  • Optimized for Noise and Power:
    • 35 mW/Ch at 2.1 nV/√Hz, 40 MSPS
    • 42 mW/Ch at 1.4 nV/√Hz, 40 MSPS
    • 52 mW/Ch at 1.3 nV/√Hz, 40 MSPS
    • 60 mW/Ch in CW Mode
  • Excellent Device-to-Device Gain Matching:
    • ±0.5 dB (Typical)
  • Low Harmonic Distortion: –55 dBc
  • Fast and Consistent Overload Recovery
  • Continuous Wave (CW) Path With:
    • Low Close-In Phase Noise of –151 dBc/Hz
      at 1-kHz Frequency Offset Off 2.5-MHz Carrier
    • Phase Resolution: λ / 16
    • Supports 16X CW Clock
    • 12-dB Suppression on Third and Fifth Harmonics
  • Digital I/Q Demodulator After ADC:
    • Decimation Filter M = 1 to 63
    • Data Throughput Reduction After Decimation
    • On-Chip RAM with 32 Preset Profiles
  • LVDS Interface With a Speed Up to 1 Gbps
  • 5-Gbps JESD Interface:
    • JESD204B Subclass 0, 1, and 2
    • 2, 4, or 8 Channels per JESD Lane
  • Small Package: 15-mm × 15-mm NFBGA-289