SLUS821J October 2008 – May 2017
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The bq2423x devices power the system while simultaneously and independently charging the battery. The input power source for charging the battery and running the system can be an AC adapter or a USB port. The devices feature dynamic power-path management (DPPM), which shares the source current between the system and battery charging and automatically reduces the charging current if the system load increases. When charging from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current limit if the input voltage falls below a threshold, preventing the USB port from crashing. The power-path architecture also permits the battery to supplement the system current requirements when the adapter cannot deliver the peak system currents.
The bq2423x can be configured as host controlled for selecting different input current limits based on the input source connected; or, as a fully stand-alone device for applications that do not support multiple types of input sources.
See Figure 22 for the Design Example Schematic.
RISET = KISET / ICHG
KISET = 870 AΩ from the electrical characteristics table.
RISET = 870 AΩ/0.2 A = 4.35kΩ
Select the closest standard value, which for this case is 4.32 kΩ. Connect this resistor between ISET (pin 16) and VSS.
RILIM = KILIM / II_MAX
RITERM = RISET × ITERM / KITERM
KITERM = 0.03 A from electrical characteristics table
RITERM = 4.32 kΩ × 0.025 A/0.03 A = 3.6 kΩ
Select the closest standard value, which for this case is 3.57 kΩ. Connect this resistor between ITERM (pin 15) and VSS
RTMR = tMAXCHG / (10 × KTMR )
KTMR = 48 s/kΩ from the electrical characteristics table.
RTMR = (7.5 hr × 3600 s/hr) / (10 × 48 s/kΩ) = 56.25 kΩ
Select the closest standard value, which for this case is 56.2 kΩ. Connect this resistor between TMR (pin 2) and VSS.
Use a 10-kΩ NTC thermistor in the battery pack (103AT). To disable the temperature sense function, use a fixed 10-kΩ resistor between the TS (pin 1) and VSS. Pay close attention to the linearity of the chosen NTC so that it provides the desired hot and cold turnoff thresholds.
LED Status: connect a 1.5-kΩ resistor in series with a LED between OUT and CHG and OUT and PGOOD.
Processor Monitoring Status: connect a pullup resistor (approximately 100 kΩ) between the processor’s power rail and CHG and PGOOD.
In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin, input, output, and battery pins. Using the values shown on the application diagram is recommended. After evaluation of these voltage signals with real system operational conditions, the user can determine if capacitance values can be adjusted toward the minimum recommended values (dc load application) or higher values for fast, high-amplitude, pulsed load applications. Note, if the application is designed with high input voltage sources (bad adapters or wrong adapters), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values so a 16-V capacitor may be adequate for a 30-V transient (verify the tested rating with capacitor manufacturer).
|RLOAD = 25Ω|
|RLOAD = 25Ω To 9Ω|
|RLOAD = 25Ω To 4.5Ω|
|RLOAD = 25Ω|
See Figure 30 for the Design Example Schematic.
VIN = VUVLO to VOVP , IFASTCHG = 200 mA, IIN(MAX) = 500 mA, Battery Temperature Charge Range 0°C to 50°C, 7.5-hour Fast Charge Safety Timer.
See the bq24232 Design Requirements.
See the bq24232 Detailed Design Procedure.
See the bq24232 Application Curves.