SLUSCL5A July   2016  – August 2016

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Dynamic Rectifier Control
      2. 8.3.2  Dynamic Power Scaling
      3. 8.3.3  VO_REG and VIREG Calculations
      4. 8.3.4  RILIM Calculations
      5. 8.3.5  Adapter Enable Functionality
      6. 8.3.6  Turning Off the Transmitter
        1. 8.3.6.1 WPC End Power Transfer (EPT)
        2. 8.3.6.2 PMA EOC
      7. 8.3.7  CM_ILIM
      8. 8.3.8  PD_DET and TMEM
      9. 8.3.9  TS, Both WPC and PMA
      10. 8.3.10 I2C Communication
      11. 8.3.11 Input Overvoltage
    4. 8.4 Device Functional Modes
    5. 8.5 Register Maps
      1. 8.5.1  Wireless Power Supply Current Register 1 (address = 0x01) [reset = 00000001]
      2. 8.5.2  Wireless Power Supply Current Register 2 (address = 0x02) [reset = 00000111 ]
      3. 8.5.3  I2C Mailbox Register (address = 0xE0) [reset = 10000000 ]
      4. 8.5.4  Wireless Power Supply FOD RAM Register (address = 0xE1) [reset =00000000 ]
      5. 8.5.5  Wireless Power User Header RAM Register (address = 0xE2) [reset = 00000000]
      6. 8.5.6  Wireless Power USER VRECT Status RAM Register (address = 0xE3) [reset = 00000000]
      7. 8.5.7  Wireless Power VOUT Status RAM Register (address = 0xE4) [reset = 00000000]
      8. 8.5.8  Wireless Power REC PWR Byte Status RAM Register (address = 0xE8) [reset = 00000000]
      9. 8.5.9  Wireless Power Mode Indicator Register (address = 0xEF) [reset = 00000000]
      10. 8.5.10 Wireless Power Prop Packet Payload RAM Byte 0 Register (address = 0xF1) [reset = 00000000]
      11. 8.5.11 Wireless Power Prop Packet Payload RAM Byte 1 Register (address = 0xF2) [reset = 00000000]
      12. 8.5.12 Wireless Power Prop Packet Payload RAM Byte 2 Register (address = 0xF3) [reset = 00000000]
      13. 8.5.13 Wireless Power Prop Packet Payload RAM Byte 3 Register (address = 0xF4) [reset = 00000000]
      14. 8.5.14 RXID Readback Register (address = 0xF5 - 0xFA) [reset = see note]
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Dual Mode Design (WPC and PMA Compliant) Power Supply 5-V Output with 1-A Maximum Current
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  Output Voltage Set Point
          2. 9.2.1.2.2  Output and Rectifier Capacitors
            1. 9.2.1.2.2.1 TMEM
          3. 9.2.1.2.3  Maximum Output Current Set Point
          4. 9.2.1.2.4  TERM Resistor
          5. 9.2.1.2.5  Setting LPRB1 and LPRB2 Resistors
          6. 9.2.1.2.6  I2C
          7. 9.2.1.2.7  Communication Current Limit
          8. 9.2.1.2.8  Receiver Coil
          9. 9.2.1.2.9  Series and Parallel Resonant Capacitors
          10. 9.2.1.2.10 Communication, Boot and Clamp Capacitors
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Embedded in System Board
      3. 9.2.3 bq51222 Implemented in Back Cover
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Robust 5-W Solution with 50% Lower Losses for Improved Thermals
    • Inductorless Receiver for Lowest Height Profile Solution
    • Adjustable Output Voltage (4.5 to 8 V) for Coil and Thermal Optimization
    • Fully Synchronous Rectifier with 96% Efficiency
    • 97% Efficient Post Regulator
    • 79% System Efficiency at 5 W
  • WPC v1.2 and PMA Compliant Communication
  • Patented Transmitter Pad Detect Function Improves User Experience
  • I2C Communication with Host

2 Applications

  • Smart Phones, Tablets, and Headsets
  • Wi-Fi Hotspots
  • Power Banks
  • Other Handheld Devices

3 Description

The bq51222 device is a fully contained wireless power receiver capable of operating in both the Wireless Power Consortium (WPC) Qi and Power Matters Alliance (PMA) protocols which allows a wireless power system to work with both inductive charging standards. The bq51222 device provides a single device power conversion (rectification and regulation) as well as the digital control and communication for both standards. It also has autonomous detection of protocol and requires no additional active devices. The bq51222 device complies with the WPC v1.2 and PMA communication protocol. Together with the WPC or a PMA primary-side controller, the bq51222 device enables a complete wireless power transfer system for a wireless power supply solution. The receiver allows for synchronous rectification, regulation and control and communication to all exist in a market-leading form factor, efficiency, and solution size.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (MAX)
bq51222 DSBGA (42) 3.586 mm × 2.874 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

SPACER

Simplified Schematic

bq51222 fp_simple_schem_sluscl5.gif

Dual Mode Efficiency 5-V Out

bq51222 D008_SLUSBS9.gif