SWRS161 December   2014 CC3100MOD


  1. 1Module Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Terminal Configuration and Functions
    1. 3.1 CC3100MOD Pin Diagram
    2. 3.2 Pin Attributes
  4. 4Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  Handling Ratings
    3. 4.3  Power-On Hours
    4. 4.4  Recommended Operating Conditions
    5. 4.5  Brown-Out and Black-Outbrown-out and black-out section
    6. 4.6  Electrical Characteristics (3.3 V, 25°C)
    7. 4.7  Thermal Resistance Characteristics for MOB Package
    8. 4.8  Reset Requirement
    9. 4.9  Current Consumption
    10. 4.10 WLAN RF Characteristics
      1. 4.10.1 WLAN Transmitter Characteristics
    11. 4.11 Timing Characteristics
      1. 4.11.1 SPI Host Interface Timings
      2. 4.11.2 Wake-Up Sequence
      3. 4.11.3 Wakeup from Hibernatewakeup from hibernate table
      4. 4.11.4 Interfaces
        1. Host SPI Interface Timing
        2. SPI Host Interface
        3. Host UART
          1. 5-Wire UART Topology
          2. 4-Wire UART Topology
          3. 3-Wire UART Topology
  5. 5Detailed Description
    1. 5.1 Overview
      1. 5.1.1 Module Features
        1. WLAN
        2. Network Stack
        3. Host Interface and Driver
        4. System
    2. 5.2 Functional Block Diagram
    3. 5.3 Wi-Fi Network Processor Subsystem
    4. 5.4 Power-Management Subsystem
      1. 5.4.1 VBAT Wide-Voltage Connection
    5. 5.5 Low-Power Operating Modes
      1. 5.5.1 Low-Power Deep Sleep
      2. 5.5.2 Hibernate
  6. 6Applications, Implementation, and Layout
    1. 6.1 Reference Schematics
    2. 6.2 Bill of Materialsbill of materials
    3. 6.3 Layout Recommendations
      1. 6.3.1 RF Section (Placement and Routing)
      2. 6.3.2 Antenna Placement and Routing
      3. 6.3.3 Transmission Line
      4. 6.3.4 General Layout Recommendation
  7. 7Environmental Requirements and Specifications
    1. 7.1 Temperature
      1. 7.1.1 PCB Bending
    2. 7.2 Handling Environment
      1. 7.2.1 Terminals
      2. 7.2.2 Falling
    3. 7.3 Storage Condition
      1. 7.3.1 Moisture Barrier Bag Before Opened
      2. 7.3.2 Moisture Barrier Bag Open
    4. 7.4 Baking Conditions
    5. 7.5 Soldering and Reflow Condition
  8. 8Product and Documentation Support
    1. 8.1 Development Support
      1. 8.1.1 Firmware Updates
    2. 8.2 Device Nomenclature
    3. 8.3 Community Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Export Control Notice
    7. 8.7 Glossary
  9. 9Mechanical Packaging and Orderable Information
    1. 9.1 Mechanical Drawing
    2. 9.2 Package Option
      1. 9.2.1 Packaging Information
        1. 9.2.2 Tape and Reel Information
      2. 9.2.2 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • MOB|63
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Applications, Implementation, and Layout


Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

6.1 Reference Schematics

Figure 6-1 shows the reference schematic for the CC3100MOD module.

typ_app.gifFigure 6-1 CC3100MOD Module Reference Schematic

6.2 Bill of Materials(1)

1 U1 CC3100MOD Texas Instruments CC3100MODR11MAMOB SimpleLink Wi-Fi MCU Module
1 E1 2.45-GHz Ant Taiyo Yuden AH316M245001-T ANT Bluetooth WLAN ZigBee® WIMAX
1 C2 1.0 pF Murata Electronics North America GJM1555C1H1R0BB01D CAP CER 1 pF 50 V NP0 0402
1 L1 3.6 nH Murata Electronics North America LQP15MN3N6B02D INDUCTOR 3.6 NH
0.1 NH 0402
  1. Resistors are not shown here. Any resistor of 5% tolerance can be used.

6.3 Layout Recommendations

6.3.1 RF Section (Placement and Routing)

RF_Section_Layout_Module_BoosterPack.gifFigure 6-2 RF Section Layout

Being wireless device, the RF section gets the top priority in terms of layout. It is very important for the RF section to be laid out correctly to get the optimum performance from the device. A poor layout can cause low output power, EVM degradation, sensitivity degradation and mask violations.

6.3.2 Antenna Placement and Routing

The antenna is the element used to convert the guided waves on the PCB traces to the free space electromagnetic radiation. The placement and layout of the antenna is the key to increased range and data rates.

The following points need to be observed for the antenna.

1 Place the antenna on an edge or corner of the PCB
2 Make sure that no signals are routed across the antenna elements on all the layers of the PCB
3 Most antennas, including the chip antenna used on the booster pack require ground clearance on all the layers of the PCB. Ensure that the ground is cleared on inner layers as well.
4 Ensure that there is provision to place matching components for the antenna. These need to be tuned for best return loss once the complete board is assembled. Any plastics or casing should also be mounted while tuning the antenna as this can impact the impedance.
5 Ensure that the antenna impedance is 50 Ω as the device is rated to work only with a
50-Ω system.
6 In case of printed antenna, ensure that the simulation is performed with the solder mask in consideration.
7 Ensure that the antenna has a near omni-directional pattern.
8 The feed point of the antenna is required to be grounded
9 To use the FCC certification of the Booster pack board, the antenna used should be of the same gain or lesser. In addition, the Antenna design should be exactly copied including the Antenna traces.

Table 6-1 Recommended Components

1 AH316M245001-T Taiyo Yuden Can be placed on edge of the PCB and uses very less PCB space
2 RFANT5220110A2T Walsim Need to place on the corner of PCB

6.3.3 Transmission Line

The RF signal from the device is routed to the antenna using a CPW-G (Coplanar Waveguide with ground) structure. This structure offers the maximum isolation across filter gap and the best possible shielding to the RF lines. In addition to the ground on the L1 layer, placing GND vias along the line also provides additional shielding

Coplanar_Waveguide_GND_Stitching.gifFigure 6-3 Coplanar Waveguide (Cross Section) with GND and Via Stitching
CPW_GND_Top_View.gifFigure 6-4 CPW with GND (Top View)

The recommended values for the PCB are provided for 4- and 2-layer boards in Table 6-2 and Table 6-3, respectively.

Table 6-2 Recommended PCB Values for 4-Layer Board (L1-L2 = 10 mils)

W 20 mils
S 18 mils
H 10 mils
Er (FR-4 substrate) 4

Table 6-3 Recommended PCB Values for 2-Layer Board (L1-L2 = 40 mils)

W 35 mils
S 6 mils
H 40 mils
Er (FR-4 substrate) 3.9

6.3.4 General Layout Recommendation

  1. Have a solid ground plane and ground vias under the module for stable system and thermal dissipation.
  2. Do not run signal traces underneath the module on a layer where the module is mounted.
  3. RF traces must have 50-Ω impedance
  4. RF trace bends must be gradual with a maximum bend of approximately 45 degrees and with trace mitered.
  5. RF traces must not have sharp corners.
  6. There must be no traces or ground under the antenna section.
  7. RF traces must have via stitching on the ground plane beside the RF trace on both sides.
  8. RF traces must be as short as possible. The antenna, RF traces, and the module must be on the edge of the PCB product in consideration of the product enclosure material and proximity.