SWAS034 February   2017 CC3120


  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagrams
  2. 2Revision History
  3. 3Terminal Configuration and Functions
    1. 3.1 Pin Diagram
    2. 3.2 Pin Attributes
    3. 3.3 Connections for Unused Pins
  4. 4Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Power-On Hours
      1. 4.3.1 Recommended Operating Conditions
    4. 4.4  Current Consumption Summary
    5. 4.5  TX Power and IBAT versus TX Power Level Settings
    6. 4.6  Brownout and Blackout Conditions
    7. 4.7  Electrical Characteristics (3.3 V, 25°C)
    8. 4.8  WLAN Receiver Characteristics
    9. 4.9  WLAN Transmitter Characteristics
    10. 4.10 WLAN Filter Requirements
    11. 4.11 Thermal Resistance Characteristics for RGK Package
    12. 4.12 Timing and Switching Characteristics
      1. 4.12.1 Power Supply Sequencing
      2. 4.12.2 Device Reset
      3. 4.12.3 Reset Timing
        1. nRESET (32k XTAL)
        2. nRESET (External 32K)
        3. Wakeup From HIBERNATE Mode
      4. 4.12.4 Clock Specifications
        1. Slow Clock Using Internal Oscillator
        2. Slow Clock Using an External Clock
        3. Fast Clock (Fref) Using an External Crystal
        4. Fast Clock (Fref) Using an External Oscillator
      5. 4.12.5 Interfaces
        1. Host SPI Interface Timing
        2. Flash SPI Interface Timing
    13. 4.13 External Interfaces
      1. 4.13.1 SPI Flash Interface
      2. 4.13.2 SPI Host Interface
    14. 4.14 Host UART
      1. 4.14.1 5-Wire UART Topology
      2. 4.14.2 4-Wire UART Topology
      3. 4.14.3 3-Wire UART Topology
  5. 5Detailed Description
    1. 5.1 Overview
    2. 5.2 Functional Block Diagram
    3. 5.3 Device Features
      1. 5.3.1 WLAN
      2. 5.3.2 Network Stack
      3. 5.3.3 Security
      4. 5.3.4 Host Interface and Driver
      5. 5.3.5 System
    4. 5.4 Power-Management Subsystem
      1. 5.4.1 VBAT Wide-Voltage Connection
      2. 5.4.2 Preregulated 1.85V
    5. 5.5 Low-Power Operating Modes
      1. 5.5.1 Low-Power Deep Sleep
      2. 5.5.2 Hibernate
      3. 5.5.3 Shutdown
    6. 5.6 Memory
      1. 5.6.1 External Memory Requirements
    7. 5.7 Restoring Factory Default Configuration
  6. 6Applications, Implementation, and Layout
    1. 6.1 Application Information
      1. 6.1.1 Typical Application—CC3120R Wide-Voltage Mode
      2. 6.1.2 Typical Application Schematic—CC3120R Preregulated, 1.85-V Mode
    2. 6.2 PCB Layout Guidelines
      1. 6.2.1 General PCB Guidelines
      2. 6.2.2 Power Layout and Routing
        1. Design Considerations
      3. 6.2.3 Clock Interfaces
      4. 6.2.4 Digital Input and Output
      5. 6.2.5 RF Interface
  7. 7Device and Documentation Support
    1. 7.1 Tools and Software
    2. 7.2 Device Nomenclature
    3. 7.3 Documentation Support
    4. 7.4 Community Resources
    5. 7.5 Trademarks
    6. 7.6 Electrostatic Discharge Caution
    7. 7.7 Export Control Notice
    8. 7.8 Glossary
  8. 8Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGK|64
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Description


The CC3120R Wi-Fi Internet-on-a-chip contains a dedicated ARM MCU that offloads many of the networking activities from the host MCU. The device includes an 802.11b/g/n radio, baseband, and MAC with a powerful crypto engine for a fast, secure WLAN and Internet connections with 256-bit encryption. The CC3120R device supports station, AP, and Wi-Fi Direct modes. The device also supports WPA2 personal and enterprise security and WPS 2.0. The Wi-Fi network processor includes an embedded IPv6 and IPv4 TCP/IP stack.

Functional Block Diagram

Figure 5-1 shows the functional block diagram of the CC3120R SimpleLink Wi-Fi solution.

CC3120 FBD_CC3120.gif Figure 5-1 Functional Block Diagram

Device Features


The WLAN features are as follows:

  • 802.11b/g/n integrated radio, modem, and MAC supporting WLAN communication as a BSS station, AP, Wi-Fi Direct client and group owner with CCK and OFDM rates in the 2.4-GHz ISM band, channels 1 to 13.
  • NOTE

    802.11n is supported only in Wi-Fi station, Wi-Fi direct, and P2P client mode

  • Autocalibrated radio with a single-ended 50-Ω interface enables easy connection to the antenna without requiring expertise in radio circuit design.
  • Advanced connection manager with multiple user-configurable profiles stored in serial-flash allows automatic fast connection to an access point without user or host intervention.
  • Supports all common Wi-Fi security modes for personal and enterprise networks with on-chip security accelerators, including: WEP, WPA/WPA2 PSK, WPA2 Enterprise (802.1x).
  • Smart provisioning options deeply integrated within the device providing a comprehensive end-to-end solution. With elaborate events notification to the host, enabling the application to control the provisioning decision flow. The wide variety of Wi-Fi provisioning methods include:
    • Access Point using HTTPS
    • SmartConfig Technology: a 1-step, 1-time process to connect a CC3120R-enabled device to the home wireless network, removing dependency on the I/O capabilities of the host MCU; thus, it is usable by deeply embedded applications
  • 802.11 transceiver mode allows transmitting and receiving of proprietary data through a socket without adding MAC or PHY headers. The 802.11 transceiver mode provides the option to select the working channel, rate, and transmitted power. The receiver mode works with the filtering options.

Network Stack

The Network Stack features are as follows:

  • Integrated IPv4, IPv6 TCP/IP stack with BSD (BSD adjacent) socket APIs for simple Internet connectivity with any MCU, microprocessor, or ASIC
  • NOTE

    Not all APIs are 100% BSD compliant. Not all BSD APIs are supported.

  • Support of 16 simultaneous TCP, UDP, or RAW sockets
  • Support of 6 simultaneous SSL\TLS sockets
  • Built-in network protocols:
    • Static IP, LLA, DHCPv4, DHCPv6 with DAD and stateless autoconfiguration
    • ARP, ICMPv4, IGMP, ICMPv6, MLD, ND
    • DNS client for easy connection to the local network and the Internet
  • Built-in network application and utilities:
      • Web page content stored on serial flash
      • RESTful APIs for setting and configuring application content
      • Dynamic user callbacks
    • Service discovery: Multicast DNS service discovery lets a client advertise its service without a centralized server. After connecting to the access point, the CC3120R device provides critical information, such as device name, IP, vendor, and port number.
    • DHCP server
    • Ping

Table 5-1 summarizes the NWP features.

Table 5-1 NWP Features

Feature Description
Wi-Fi standards 802.11b/g/n station
802.11b/g AP supporting up to four stations
Wi-Fi Direct client and group owner
Wi-Fi Channels 1 to 13
Wi-Fi security WEP, WPA/WPA2 PSK, WPA2 enterprise (802.1x)
Wi-Fi provisioning SmartConfig technology, Wi-Fi protected setup (WPS2), AP mode with internal HTTP/HTTPS web server
IP protocols IPv4/IPv6
IP addressing Static IP, LLA, DHCPv4, DHCPv6 (Stateful) with DAD and stateless auto configuration
Cross layer ARP, ICMPv4, IGMP, ICMPv6, MLD, NDP
Transport UDP, TCP
Network applications and utilities Ping
HTTP/HTTPS web server
DHCP server
Host interface UART/SPI
Security Device identity
Trusted root-certificate catalog
TI root-of-trust public key
Power management Enhanced power policy management uses 802.11 power save and deep sleep power modes
Other RF Transceiver
Programmable RX Filters with Events trigger mechanism including WoWLAN
Recovery mechanism – Restore to factory default


The SimpleLink Wi-Fi CC3120R Internet-on-a-chip device enhances the security capabilities available for development of IoT devices, while completely offloading these activities from the MCU to the networking subsystem. The security capabilities include the following key features:

Wi-Fi and Internet Security:

  • Personal and enterprise Wi-Fi security
    • Personal standards
      • AES (WPA2-PSK)
      • TKIP (WPA-PSK
      • WEP
    • Enterprise standards
      • EAP Fast
      • EAP PEAPv0 MSCHAPv2
      • EAP PEAPv0 TLS
      • EAP TTLS TLS
  • Secure sockets
    • Protocol versions: SSL v3/TLS 1.0/TLS 1.1/TLS 1.2
    • On-chip powerful crypto engine for fast, secure Wi-Fi and internet connections with 256-bit AES encryption for TLS and SSL connections
    • Ciphers suites
    • Server authentication
    • Client authentication
    • Domain name verification
    • Socket upgrade to secure socket – STARTTLS
  • Secure HTTP server (HTTPS)
  • The Trusted root-certificate catalog verifies that the CA used by the application is trusted and known secure content delivery
  • The TI root-of-trust public key is a hardware-based mechanism that allows authenticating TI as the genuine origin of a given content using asymmetric keys
  • Secure content delivery allows file transfer to the system in a secure way on any unsecured tunnel

Code and Data Security:

  • Secured network information: Network passwords and certificates are encrypted
  • Secured and authenticated service pack: SP is signed based on TI certificate

Host Interface and Driver

  • Interfaces over a 4-wire serial peripheral interface (SPI) with any MCU or a processor at a clock speed of 20 MHz.
  • Interfaces over UART with any MCU with a baud rate up to 3 Mbps. A low footprint driver is provided for TI MCUs and is easily ported to any processor or ASIC.
  • Simple APIs enable easy integration with any single-threaded or multithreaded application.


  • Works from a single preregulated power supply or connects directly to a battery
  • Ultra-low leakage when disabled (hibernate mode) with a current of less than 4 µA with the RTC running
  • Integrated clock sources

Power-Management Subsystem

The CC3120R power-management subsystem contains DC-DC converters to accommodate the different voltage or current requirements of the system.

  • Digital DC-DC (Pin 44)
    • Input: VBAT wide voltage (2.1 to 3.6 V) or preregulated 1.85 V
  • ANA1 DC-DC (Pin 38)
    • Input: VBAT wide voltage (2.1 to 3.6 V)
    • In preregulated 1.85-V mode, the ANA1 DC-DC converter is bypassed.
  • PA DC-DC (Pin 39)
    • Input: VBAT wide voltage (2.1 to 3.6 V)
    • In preregulated 1.85-V mode, the PA DC-DC converter is bypassed.

The CC3120R device is a single-chip WLAN radio solution used on an embedded system with a wide-voltage supply range. The internal power management, including DC-DC converters and LDOs, generates all of the voltages required for the device to operate from a wide variety of input sources. For maximum flexibility, the device can operate in the modes described in Section 5.4.1 and Section 5.4.2.

VBAT Wide-Voltage Connection

In the wide-voltage battery connection, the device is powered directly by the battery or preregulated 3.3-V supply. All other voltages required to operate the device are generated internally by the DC-DC converters. This scheme supports wide-voltage operation from 2.1 to 3.6 V and is thus the most common mode for the device.

Preregulated 1.85V

The preregulated 1.85-V mode of operation applies an external regulated 1.85 V directly at pins 10, 25, 33, 36, 37, 39, 44, 48, and 54 of the device. The VBAT and the VIO are also connected to the 1.85-V supply. This mode provides the lowest BOM count version in which inductors used for PA DC-DC and ANA1 DC-DC (2.2 and 1 µH) and a capacitor (22 µF) can be avoided.

In the preregulated 1.85-V mode, the regulator providing the 1.85 V must have the following characteristics:

  • Load current capacity ≥900 mA
  • Line and load regulation with <2% ripple with 500-mA step current and settling time of < 4 µs with the load step


The regulator must be placed as close as possible to the device so that the IR drop to the device is very low.

Low-Power Operating Modes

This section describes the low-power modes supported by the device to optimize battery life.

Low-Power Deep Sleep

The low-power deep-sleep (LPDS) mode is an energy-efficient and transparent sleep mode that is entered automatically during periods of inactivity based on internal power optimization algorithms. The device can wake up in less than 3 ms from the internal timer or from any incoming host command. Typical battery drain in this mode is 115 µA. During LPDS mode, the device retains the software state and certain configuration information. The operation is transparent to the external host; thus, no additional handshake is required to enter or exit LPDS mode.


The hibernate mode is the lowest power mode in which all of the digital logic is power-gated. Only a small section of the logic powered directly by the main input supply is retained. The RTC is kept running and the device wakes up once the nHIB line is asserted by the host driver. The wake-up time is longer than LPDS mode at approximately 50 ms.


Wake-up time can be extended depending on the service-pack size.


The shutdown mode is the lowest power-mode system-wise. All device logics are off, including the real-time clock (RTC). The wake-up time in this mode is longer than hibernate at approximately 1.1 s.


External Memory Requirements

The CC3120R device maintains a proprietary file system on the sFLASH. The CC3120R file system stores the service pack file, system files, configuration files, certificate files, web page files, and user files. By using a format command through the API, users can provide the total size allocated for the file system. The starting address of the file system cannot be set and is always at the beginning of the sFLASH. The applications microcontroller must access the sFLASH memory area allocated to the file system directly through the CC3120R file system. The applications microcontroller must not access the sFLASH memory area directly.

The file system manages the allocation of sFLASH blocks for stored files according to download order, which means that the location of a specific file is not fixed in all systems. Files are stored on sFLASH using human-readable filenames rather than file IDs. The file system API works using plain text, and file encryption and decryption is invisible to the user. Encrypted files can be accessed only through the file system.

All file types can have a maximum of 100 supported files in the file system. All files are stored in 4-KB blocks and thus use a minimum of 4KB of flash space. Fail-safe files require twice the original size and use a minimum of 8KB. Encrypted files are counted as fail-safe in terms of space. The maximum file size is 1MB.

Table 5-2 lists the minimum required memory consumption under the following assumptions:

  • System files in use consume 64 blocks (256KB).
  • Vendor files are not taken into account.
  • Gang image:
    • Storage for the gang image is rounded up to 32 blocks (meaning 128-KB resolution).
    • Gang image size depends on the actual content size of all components. Additionally, the image should be 128-KB aligned so unaligned memory is considered lost. Service pack, system files, and the 128-KB aligned memory are assumed to occupy 256KB.
  • All calculations consider that the restore-to-default is enabled.

Table 5-2 Title

ITEM CC3120 [KB]
File system allocation table 20
System and configuration files 256
Service Pack 264
Gang image size 256
Total 796
Minimal flash size 8MBit
Recommended flash size 16MBit



The maximum supported sFLASH size is 32MB (256Mb). Please refer to Using Serial Flash on CC3120/CC3220 SimpleLink™ Wi-Fi® and Internet-of-Things Devices.

Restoring Factory Default Configuration

The device has an internal recovery mechanism that allows rolling back the file system to its predefined factory image or restoring the factory default parameters of the device. The factory image is kept in a separate sector on the sFLASH in a secure manner and cannot be accessed from the host processor. The following restore modes are supported:

  • None—no factory restore settings
  • Enable restore of factory default parameters
  • Enable restore of factory image and factory default parameters

The restore process is performed by pulling or forcing SOP[2:0] = 110 pins and toggling the nRESET pin from low to high.

The process is fail-safe and resumes operation if a power failure occurs before the restore is finished. The restore process typically takes about 8 seconds, depending on the attributes of the serial flash vendor.