SWAS034 February   2017 CC3120

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagrams
  2. 2Revision History
  3. 3Terminal Configuration and Functions
    1. 3.1 Pin Diagram
    2. 3.2 Pin Attributes
    3. 3.3 Connections for Unused Pins
  4. 4Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Power-On Hours
      1. 4.3.1 Recommended Operating Conditions
    4. 4.4  Current Consumption Summary
    5. 4.5  TX Power and IBAT versus TX Power Level Settings
    6. 4.6  Brownout and Blackout Conditions
    7. 4.7  Electrical Characteristics (3.3 V, 25°C)
    8. 4.8  WLAN Receiver Characteristics
    9. 4.9  WLAN Transmitter Characteristics
    10. 4.10 WLAN Filter Requirements
    11. 4.11 Thermal Resistance Characteristics for RGK Package
    12. 4.12 Timing and Switching Characteristics
      1. 4.12.1 Power Supply Sequencing
      2. 4.12.2 Device Reset
      3. 4.12.3 Reset Timing
        1. 4.12.3.1 nRESET (32k XTAL)
        2. 4.12.3.2 nRESET (External 32K)
        3. 4.12.3.3 Wakeup From HIBERNATE Mode
      4. 4.12.4 Clock Specifications
        1. 4.12.4.1 Slow Clock Using Internal Oscillator
        2. 4.12.4.2 Slow Clock Using an External Clock
        3. 4.12.4.3 Fast Clock (Fref) Using an External Crystal
        4. 4.12.4.4 Fast Clock (Fref) Using an External Oscillator
      5. 4.12.5 Interfaces
        1. 4.12.5.1 Host SPI Interface Timing
        2. 4.12.5.2 Flash SPI Interface Timing
    13. 4.13 External Interfaces
      1. 4.13.1 SPI Flash Interface
      2. 4.13.2 SPI Host Interface
    14. 4.14 Host UART
      1. 4.14.1 5-Wire UART Topology
      2. 4.14.2 4-Wire UART Topology
      3. 4.14.3 3-Wire UART Topology
  5. 5Detailed Description
    1. 5.1 Overview
    2. 5.2 Functional Block Diagram
    3. 5.3 Device Features
      1. 5.3.1 WLAN
      2. 5.3.2 Network Stack
      3. 5.3.3 Security
      4. 5.3.4 Host Interface and Driver
      5. 5.3.5 System
    4. 5.4 Power-Management Subsystem
      1. 5.4.1 VBAT Wide-Voltage Connection
      2. 5.4.2 Preregulated 1.85V
    5. 5.5 Low-Power Operating Modes
      1. 5.5.1 Low-Power Deep Sleep
      2. 5.5.2 Hibernate
      3. 5.5.3 Shutdown
    6. 5.6 Memory
      1. 5.6.1 External Memory Requirements
    7. 5.7 Restoring Factory Default Configuration
  6. 6Applications, Implementation, and Layout
    1. 6.1 Application Information
      1. 6.1.1 Typical Application—CC3120R Wide-Voltage Mode
      2. 6.1.2 Typical Application Schematic—CC3120R Preregulated, 1.85-V Mode
    2. 6.2 PCB Layout Guidelines
      1. 6.2.1 General PCB Guidelines
      2. 6.2.2 Power Layout and Routing
        1. 6.2.2.1 Design Considerations
      3. 6.2.3 Clock Interfaces
      4. 6.2.4 Digital Input and Output
      5. 6.2.5 RF Interface
  7. 7Device and Documentation Support
    1. 7.1 Tools and Software
    2. 7.2 Device Nomenclature
    3. 7.3 Documentation Support
    4. 7.4 Community Resources
    5. 7.5 Trademarks
    6. 7.6 Electrostatic Discharge Caution
    7. 7.7 Export Control Notice
    8. 7.8 Glossary
  8. 8Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGK|64
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Terminal Configuration and Functions

Pin Diagram

Figure 3-1 shows pin assignments for the 64-pin VQFN package.

CC3120 3120_MOD-DEV_Symbol.gif Figure 3-1 VQFN 64-Pin Assignments
Top View

Pin Attributes

Table 3-1 describes the CC3120R pins.

NOTE

If an external device drives a positive voltage to signal pads when the CC3120R device is not powered, DC current is drawn from the other device. If the drive strength of the external device is adequate, an unintentional wakeup and boot of the CC3120R device can occur. To prevent current draw, TI recommends one of the following:

  • All devices interfaced to the CC3120R device must be powered from the same power rail as the CC3120R device.
  • Use level shifters between the CC3120R device and any external devices fed from other independent rails.
  • The nRESET pin of the CC3120R device must be held low until the VBAT supply to the device is driven and stable.

Table 3-1 Pin Attributes

PIN DEFAULT FUNCTION STATE AT RESET AND HIBERNATE I/O TYPE(1) DESCRIPTION
2 nHIB Hi-Z I Hibernate signal input to the NWP subsystem (active low). This is connected to the MCU GPIO. If the GPIO from the MCU can float while the MCU enters low power, consider adding a pullup resistor on the board to avoid floating.
3 Reserved Hi-Z Reserved for future use
5 HOST_SPI_CLK Hi-Z I Host interface SPI clock
6 HOST_SPI_MOSI Hi-Z I Host interface SPI data input
7 HOST_SPI_MISO Hi-Z O Host interface SPI data output
8 HOST_SPI_nCS Hi-Z I Host interface SPI chip select (active low)
9 VDD_DIG1 Hi-Z Power Digital core supply (1.2 V)
10 VIN_IO1 Hi-Z Power I/O supply
11 FLASH_SPI_CLK Hi-Z O Serial flash interface: SPI clock
12 FLASH_SPI_MOSI Hi-Z O Serial flash interface: SPI data out
13 FLASH _SPI_MISO Hi-Z I Serial flash interface: SPI data in (active high)
14 FLASH _SPI_CS Hi-Z O Serial flash interface: SPI chip select
(active low)
15 HOST_INTR Hi-Z O Interrupt output (active high)
19 Reserved Hi-Z Connect a 100-kΩ pulldown resistor to ground.
21 SOP2/TCXO_EN Hi-Z O Controls restore to default mode. Enable signal for external TCXO. Add a 10-kΩ pulldown resistor to ground.
22 WLAN_XTAL_N Hi-Z Analog Connect the WLAN 40-MHz XTAL here.
23 WLAN_XTAL_P Hi-Z Analog Connect the WLAN 40-MHz XTAL here.
24 VDD_PLL Hi-Z Power Internal PLL power supply (1.4 V nominal)
25 LDO_IN2 Hi-Z Power Input to internal LDO
29 Reserved Hi-Z O Reserved for future use
30
31 RF_BG Hi-Z RF 2.4-GHz RF TX, RX
32 nRESET Hi-Z I RESET input for the device. Active low input. Use RC circuit (100 k || 0.1 µF) for power on reset (POR).
33 VDD_PA_IN Hi-Z Power Power supply for the RF power amplifier (PA)
34 SOP1 Hi-Z Controls restore to default mode. Add 100-kΩ pulldown to ground. Factory default function.
35 SOP0 Hi-Z Controls restore to default mode. Add 100-kΩ pulldown to ground. Factory default function.
36 LDO_IN1 Hi-Z Power Input to internal LDO
37 VIN_DCDC_ANA Hi-Z Power Power supply for the DC-DC converter for analog section
38 DCDC_ANA_SW Hi-Z Power Analog DC-DC converter switch output
39 VIN_DCDC_PA Hi-Z Power PA DC-DC converter input supply
40 DCDC_PA_SW_P Hi-Z Power PA DC-DC converter switch output +ve
41 DCDC_PA_SW_N Hi-Z Power PA DC-DC converter switch output –ve
42 DCDC_PA_OUT Hi-Z Power PA DC-DC converter output. Connect the output capacitor for DC-DC here.
43 DCDC_DIG_SW Hi-Z Power Digital DC-DC converter switch output
44 VIN_DCDC_DIG Hi-Z Power Power supply input for the digital DC-DC converter
45 DCDC_ANA2_SW_P Hi-Z Power Analog2 DC-DC converter switch output +ve
46 DCDC_ANA2_SW_N Hi-Z Power Analog2 DC-DC converter switch output –ve
47 VDD_ANA2 Hi-Z Power Analog2 power supply input
48 VDD_ANA1 Hi-Z Power Analog1 power supply input
49 VDD_RAM Hi-Z Power Power supply for the internal RAM
50 UART1_nRTS Hi-Z O UART host interface (active low)
51 RTC_XTAL_P Hi-Z Analog 32.768-kHz XTAL_P or external CMOS level clock input
52 RTC_XTAL_N Hi-Z Analog 32.768-kHz XTAL_N or 100-kΩ external pullup for external clock
54 VIN_IO2 Hi-Z Power I/O power supply. Same as battery voltage.
55 UART1_TX Hi-Z O UART host interface. Connect to test point on prototype for flash programming.
56 VDD_DIG2 Hi-Z Power Digital power supply (1.2 V)
57 UART1_RX Hi-Z I UART host interface; connect to test point on prototype for flash programming.
58 TEST_58 Test signal; connect to an external test point.
59 TEST_59 Test signal; connect to an external test point.
60 TEST_60 Hi-Z O Test signal; connect to an external test point.
61 UART1_nCTS Hi-Z I UART host interface (active low)
62 TEST_62 Hi-Z O Test signal; connect to an external test point.
65 GND Power Ground tab used as thermal and electrical ground
I = Input
O = Output RF = radio frequency
I/O = bidirectional

Connections for Unused Pins

All unused pins must be left as no connect (NC) pins. Table 3-2 provides a list of NC pins.

Table 3-2 Connections for Unused Pins

PIN DEFAULT FUNCTION STATE AT RESET AND HIBERNATE I/O TYPE(1) DESCRIPTION
1 NC WLAN analog Unused; leave unconnected.
4 NC WLAN analog Unused; leave unconnected.
16 NC WLAN analog Unused; leave unconnected.
17 NC WLAN analog Unused; leave unconnected.
18 NC WLAN analog Unused; leave unconnected.
20 NC WLAN analog Unused; leave unconnected.
26 NC WLAN analog Unused; leave unconnected.
27 NC WLAN analog Unused; leave unconnected.
28 NC WLAN analog Unused; leave unconnected.
26 NC WLAN analog Unused; leave unconnected.
27 NC WLAN analog Unused; leave unconnected.
28 NC WLAN analog Unused; leave unconnected.
53 NC WLAN analog Unused; leave unconnected.
63 NC WLAN analog Unused; leave unconnected.
64 NC WLAN analog Unused; leave unconnected.