SWRS206C March   2017  – December 2018 CC3220MOD , CC3220MODA

PRODUCTION DATA.  

  1. Module Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagrams
  2. Revision History
  3. Device Comparison
    1. 3.1 Related Products
  4. Terminal Configuration and Functions
    1. 4.1 CC3220MODx and CC3220MODAx Pin Diagram
    2. 4.2 Pin Attributes
      1. Table 4-1 Module Pin Attributes
    3. 4.3 Connections for Unused Pins
    4. 4.4 Pin Attributes and Pin Multiplexing
    5. 4.5 Drive Strength and Reset States for Analog-Digital Multiplexed Pins
    6. 4.6 Pad State After Application of Power to Chip, but Before Reset Release
  5. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Current Consumption (CC3220MODS and CC3220MODAS)
    5. 5.5  Current Consumption (CC3220MODSF and CC3220MODASF)
    6. 5.6  TX Power and IBAT Versus TX Power Level Settings
    7. 5.7  Brownout and Blackout Conditions
    8. 5.8  Electrical Characteristics
    9. 5.9  CC3220MODAx Antenna Characteristics
    10. 5.10 WLAN Receiver Characteristics
    11. 5.11 WLAN Transmitter Characteristics
    12. 5.12 Reset Requirement
    13. 5.13 Thermal Resistance Characteristics for MOB and MON Packages
    14. 5.14 Timing and Switching Characteristics
      1. 5.14.1 Power-Up Sequencing
      2. 5.14.2 Power-Down Sequencing
      3. 5.14.3 Device Reset
      4. 5.14.4 Wake Up From Hibernate Timing
      5. 5.14.5 Peripherals Timing
        1. 5.14.5.1  SPI
          1. 5.14.5.1.1 SPI Master
          2. 5.14.5.1.2 SPI Slave
        2. 5.14.5.2  I2S
          1. 5.14.5.2.1 I2S Transmit Mode
          2. 5.14.5.2.2 I2S Receive Mode
        3. 5.14.5.3  GPIOs
          1. 5.14.5.3.1 GPIO Input Transition Time Parameters
        4. 5.14.5.4  I2C
        5. 5.14.5.5  IEEE 1149.1 JTAG
        6. 5.14.5.6  ADC
        7. 5.14.5.7  Camera Parallel Port
        8. 5.14.5.8  UART
        9. 5.14.5.9  External Flash Interface
        10. 5.14.5.10 SD Host
        11. 5.14.5.11 Timers
  6. Detailed Description
    1. 6.1  Overview
    2. 6.2  Arm® Cortex®-M4 Processor Core Subsystem
    3. 6.3  Wi-Fi® Network Processor Subsystem
      1. 6.3.1 WLAN
      2. 6.3.2 Network Stack
    4. 6.4  Security
    5. 6.5  Power-Management Subsystem
      1. 6.5.1 VBAT Wide-Voltage Connection
    6. 6.6  Low-Power Operating Mode
    7. 6.7  Memory
      1. 6.7.1 Internal Memory
        1. 6.7.1.1 SRAM
        2. 6.7.1.2 ROM
        3. 6.7.1.3 Flash Memory
        4. 6.7.1.4 Memory Map
    8. 6.8  Restoring Factory Default Configuration
    9. 6.9  Boot Modes
      1. 6.9.1 Boot Mode List
    10. 6.10 Device Certification and Qualification
      1. 6.10.1 FCC Certification and Statement
      2. 6.10.2 Industry Canada (IC) Certification and Statement
      3. 6.10.3 ETSI/CE Certification
      4. 6.10.4 MIC Certification
      5. 6.10.5 SRRC Certification and Statement
    11. 6.11 Module Markings
    12. 6.12 End Product Labeling
    13. 6.13 Manual Information to the End User
  7. Applications, Implementation, and Layout
    1. 7.1 Typical Application
    2. 7.2 Device Connection and Layout Fundamentals
      1. 7.2.1 Power Supply Decoupling and Bulk Capacitors
      2. 7.2.2 Reset
      3. 7.2.3 Unused Pins
    3. 7.3 PCB Layout Guidelines
      1. 7.3.1 General Layout Recommendations
      2. 7.3.2 CC3220MODx RF Layout Recommendations
        1. 7.3.2.1 Antenna Placement and Routing
        2. 7.3.2.2 Transmission Line Considerations
      3. 7.3.3 CC3220MODAx RF Layout Recommendations
  8. Environmental Requirements and Specifications
    1. 8.1 PCB Bending
    2. 8.2 Handling Environment
      1. 8.2.1 Terminals
      2. 8.2.2 Falling
    3. 8.3 Storage Condition
      1. 8.3.1 Moisture Barrier Bag Before Opened
      2. 8.3.2 Moisture Barrier Bag Open
    4. 8.4 Baking Conditions
    5. 8.5 Soldering and Reflow Condition
  9. Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Development Tools and Software
    3. 9.3 Firmware Updates
    4. 9.4 Device Nomenclature
    5. 9.5 Documentation Support
      1. 9.5.1 Community Resources
    6. 9.6 Trademarks
    7. 9.7 Electrostatic Discharge Caution
    8. 9.8 Export Control Notice
    9. 9.9 Glossary
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical, Land, and Solder Paste Drawings
    2. 10.2 Package Option Addendum
      1. 10.2.1 Packaging Information
      2. 10.2.2 Tape and Reel Information
        1. 10.2.2.1 CC3220MODx Tape Specifications
        2. 10.2.2.2 CC3220MODAx Tape Specifications
          1. 10.2.2.1 CC3220MODx Tape Specifications
          2. 10.2.2.2 CC3220MODAx Tape Specifications

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • MON|63
Thermal pad, mechanical data (Package|Pins)

Timers

Programmable timers can be used to count or time external events that drive the timer input pins. The general-purpose timer module (GPTM) of the CC3220MODx and CC3220MODAx contains 16- or 32-bit GPTM blocks. Each 16- or 32-bit GPTM block provides two 16-bit timers or counters (referred to as Timer A and Timer B) that can be configured to operate independently as timers or event counters, or they can be concatenated to operate as one 32-bit timer. Timers can also be used to trigger µDMA transfers.

The GPTM contains four 16- or 32-bit GPTM blocks with the following functional options:

  • Operating modes:
    • 16- or 32-bit programmable one-shot timer
    • 16- or 32-bit programmable periodic timer
    • 16-bit general-purpose timer with an 8-bit prescaler
    • 16-bit input-edge count- or time-capture modes with an 8-bit prescaler
    • 16-bit PWM mode with an 8-bit prescaler and software-programmable output inversion of the PWM signal
  • Counts up or counts down
  • Sixteen 16- or 32-bit capture compare pins (CCP)
  • User-enabled stalling when the microcontroller asserts CPU Halt flag during debug
  • Ability to determine the elapsed time between the assertion of the timer interrupt and entry into the interrupt service routine
  • Efficient transfers using micro direct memory access controller (µDMA):
    • Dedicated channel for each timer
    • Burst request generated on timer interrupt
  • Runs from system clock (80 MHz)