SLPS430A August   2013  – August 2014 CSD95375Q4M

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
  7. 7 Electrical Characteristics
  8. 8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Functional Block Diagram
    2. 9.2 Feature Description
      1. 9.2.1 Powering CSD95375Q4M And Gate Drivers
    3. 9.3 Undervoltage Lockout Protection (UVLO)
    4. 9.4 PWM Pin
    5. 9.5 SKIP# Pin
      1. 9.5.1 Zero Crossing (ZX) Operation
    6. 9.6 Integrated Boost-Switch
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Power Loss Curves
      2. 10.1.2 Safe Operating Curves (SOA)
      3. 10.1.3 Normalized Curves
      4. 10.1.4 Calculating Power Loss and SOA
        1. 10.1.4.1 Design Example
        2. 10.1.4.2 Calculating Power Loss
        3. 10.1.4.3 Calculating SOA Adjustments
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Recommended PCB Design Overview
      2. 11.1.2 Electrical Performance
      3. 11.1.3 Thermal Performance
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Mechanical Drawing
    2. 13.2 Recommended PCB Land Pattern
    3. 13.3 Recommended Stencil Opening

Package Options

Mechanical Data (Package|Pins)
  • DPC|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 93% System Efficiency at 15 A
  • Max Rated Continuous Current 25 A, Peak 60 A
  • High Frequency Operation (up to 2 MHz)
  • High Density - SON 3.5 × 4.5-mm Footprint
  • Ultra-Low Inductance Package
  • System Optimized PCB Footprint
  • Ultra-Low Quiescent (ULQ) Current Mode
  • 3.3 V and 5 V PWM Signal Compatible
  • Diode Emulation Mode with FCCM
  • Tri-State PWM Input
  • Integrated Bootstrap Diode
  • Shoot Through Protection
  • RoHS Compliant – Lead-Free Terminal Plating
  • Halogen Free

2 Applications

  • Ultrabook/Notebook DC/DC Converters
  • Multiphase Vcore and DDR Solutions
  • Point of Load Synchronous Buck in Networking, Telecom, and Computing Systems

3 Description

The CSD95375Q4M NexFET™ Power Stage is a highly optimized design for use in a high power, high density Synchronous Buck converter. This product integrates the driver IC and NexFET technology to complete the power stage switching function. The driver IC has a built-in selectable diode emulation function that enables DCM operation to improve light load efficiency. In addition, the driver IC supports ULQ mode that enables Connected Standby for Windows™ 8. With the PWM input in tri-state, quiescent current is reduced to 130 µA, with immediate response. When SKIP# is held at tri-state, the current is reduced to 8 µA (typically 20 µs is required to resume switching). This combination produces a high current, high efficiency, and high speed switching device in a small 3.5 × 4.5-mm outline package. In addition, the PCB footprint has been optimized to help reduce design time and simplify the completion of the overall system design.

Device Information(1)

Device Media Qty Package Ship
CSD95375Q4M 13-Inch Reel 2500 SON 3.5 × 4.5 mm
Plastic Package		 Tape and Reel
CSD95375Q4MT 7-Inch Reel 250
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Application Diagram

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Typical Power Stage Efficiency and Power Loss

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