SNAS362G May   2006  – April 2016 DAC104S085 , DAC104S085-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings - DAC104S085
    3. 7.3 ESD Ratings - DAC104S085-Q1
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Electrical Characteristics
    7. 7.7 Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Output Amplifiers
      2. 8.3.2 Reference Voltage
      3. 8.3.3 Power-On Reset
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Modes
      2. 8.4.2 Bipolar Operation
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
      2. 8.5.2 Input Shift Register
      3. 8.5.3 DSP and Microprocessor Interfacing
        1. 8.5.3.1 ADSP-2101 and ADSP2103 Interfacing
        2. 8.5.3.2 80C51 and 80L51 Interface
        3. 8.5.3.3 68HC11 Interface
        4. 8.5.3.4 Microwire Interface
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 LM4130
      2. 9.1.2 LP3985
      3. 9.1.3 LP2980
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
        1. 12.1.1.1 Specification Definitions
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature
  • Ensured Monotonicity
  • Low Power Operation
  • Rail-to-Rail Voltage Output
  • Power-On Reset to 0 V
  • Simultaneous Output Updating
  • Wide Power Supply Range (2.7 V to 5.5 V)
  • Key Specifications
    • Resolution: 10 bits
    • INL: ±2 LSB (Maximum)
    • DNL: +0.35 / −0.25 LSB (Maximum)
    • Settling Time: 6 μs (Maximum)
    • Zero Code Error: 15 mV (Maximum)
    • Full-Scale Error: −0.75% FS (Maximum)
    • Typical Supply Power
      • Normal Mode: 1.1 mW (3 V), 2.5 mW (5 V)
      • Power Down: 0.3 μW (3 V), 0.8 μW (5 V)

2 Applications

  • Battery-Powered Instruments
  • Digital Gain and Offset Adjustment
  • Programmable Voltage and Current Sources
  • Programmable Attenuators
  • Automotives

3 Description

The DAC104S085 device is a full-featured, general-purpose QUAD 10-bit voltage-output digital-to-analog converter (DAC) that can operate from a single 2.7-V to 5.5-V supply and consumes 1.1 mW at 3 V and
2.5 mW at 5 V. The DAC104S085 is packaged in 10-pin SON and VSSOP packages. The 10-pin SON package makes the DAC104S085 the smallest QUAD DAC in its class. The on-chip output amplifier allows rail-to-rail output swing and the three wire serial interface operates at clock rates up to 40 MHz over the entire supply voltage range. Competitive devices are limited to 25-MHz clock rates at supply voltages in the 2.7-V to 3.6-V range. The serial interface is compatible with standard SPI, QSPI, MICROWIRE, and DSP interfaces.

The reference for the DAC104S085 serves all four channels and can vary in voltage between 1 V and VA, providing the widest possible output dynamic range. The DAC104S085 has a 16-bit input shift register that controls the outputs to be updated, the mode of operation, the power-down condition, and the binary input data. All four outputs can be updated simultaneously or individually depending on the setting of the two mode of operation bits.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
DAC104S085-xx VSSOP (10) 3.00 mm × 3.00 mm
WSON (10) 3.00 mm × 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Block Diagram

DAC104S085 DAC104S085-Q1 20195303.gif