SLAS535F September   2007  – October 2018 DAC5652A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1.     Functional Block Diagram
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: DC
    6. 6.6  Electrical Characteristics: AC
    7. 6.7  Electrical Characteristics: Digital Input
    8. 6.8  Electrical Characteristics: Power Supply
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Digital Inputs
      2. 7.3.2 References
        1. 7.3.2.1 Internal Reference
        2. 7.3.2.2 External Reference
    4. 7.4 Device Functional Modes
      1. 7.4.1 Input Interfaces
        1. 7.4.1.1 Dual-Bus Data Interface and Timing
        2. 7.4.1.2 Single-Bus Interleaved Data Interface and Timing
      2. 7.4.2 Gain Setting Option
      3. 7.4.3 Sleep Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 DAC Transfer Function
        1. 8.1.1.1 Analog Outputs
      2. 8.1.2 Output Configurations
      3. 8.1.3 Differential With Transformer
      4. 8.1.4 Single-Ended Configuration
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1 Application Information

The DAC5652A is a 10-bit dual DAC with max update rate of 275 MSPS. The DAC supports two different modes of operation: dual bus and single bus. In dual-bus mode, the DAC provides two independent transmit paths that can be programmed for two different update rates. In single-bus mode, the interleaved data for both channels are applied at the A-channel input bus. The B-channel input bus is not used in this mode. The clock and write input are now shared by both DACs. Thus, two different input signals can be transmitted from the two channels, but the update rate for both channels is the same.