SLVSBA5D October   2012  – April 2016 DRV8313

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Stage
      2. 7.3.2 Bridge Control
      3. 7.3.3 Charge Pump
      4. 7.3.4 Comparator
      5. 7.3.5 Protection Circuits
        1. 7.3.5.1 Undervoltage Lockout (UVLO)
        2. 7.3.5.2 Thermal Shutdown (TSD)
        3. 7.3.5.3 Overcurrent Protection (OCP)
    4. 7.4 Device Functional Modes
      1. 7.4.1 nRESET and nSLEEP Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Three-Phase Brushless-DC Motor Control
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Motor Voltage
          2. 8.2.1.2.2 Motor Commutation
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Three-Phase Brushless-DC Motor Control With Current Monitor
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Trip Current
          2. 8.2.2.2.2 Sense Resistor
      3. 8.2.3 Brushed-DC and Solenoid Load
        1. 8.2.3.1 Design Requirements
          1. 8.2.3.1.1 Detailed Design Procedure
      4. 8.2.4 Three Solenoid Loads
        1. 8.2.4.1 Design Requirements
          1. 8.2.4.1.1 Detailed Design Procedure
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Heatsinking
    4. 10.4 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
Power-supply voltage (VM) –0.3 65 V
Power supply voltage ramp rate (VM) 0 2 V/µs
Charge pump voltage (VCP, CPH) –0.3 VM + 12 V
Charge pump negative switching pin (CPL) –0.3 VM V
Internal regulator current output (V3P3) 0 10 mA
Internal regulator voltage (V3P3) –0.3 3.8 V
Control pin voltage (nRESET, nSLEEP, nFAULT, nCOMPO, ENx, INx) –0.5 7 V
Comparator input-voltage (COMPP, COMPN) –0.5 7 V
Open drain output current (nFAULT, nCOMPO) 0 10 mA
Continuous phase node pin voltage (OUTx) –0.7 VM + 0.7 V
Continuous 1/2-H-bridge source voltage (PGNDx) –600 600 mV
Peak output current (OUTx) Internally limited A
Operating junction temperature TJ –40 150 °C
Storage temperature Tstg –60 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the network ground terminal.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±3000 V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VM Motor power-supply voltage(1) 8 60 V
VIN Digital pin voltage 0 5.5 V
fPWM Applied PWM signal on ENx, INx 0 250 kHz
VGNDX PGNDx pin voltage –500 500 mV
IV3P3 V3P3 load current 0 10(2) mA
TA Operating ambient temperature –40 125 °C
(1) Both VM pins must be connected to the same supply voltage.
(2) Power dissipation and thermal limits must be observed.

6.4 Thermal Information

THERMAL METRIC (1) DRV8313 UNIT
PWP (HTSSOP) RHH (VQFN)
28 PINS 36 PINS
RθJA Junction-to-ambient thermal resistance 31.6 31.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 15.9 17.3 °C/W
RθJB Junction-to-board thermal resistance 5.6 5.6 °C/W
ψJT Junction-to-top characterization parameter 0.2 0.2 °C/W
ψJB Junction-to-board characterization parameter 5.5 5.6 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.4 1.3 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

TA = 25°C, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES
IVM VM operating supply current VM = 24 V, fPWM < 50 kHz 1 5 mA
IVMQ VM sleep-mode supply current VM = 24 V 500 800 µA
INTERNAL REGULATOR (V3P3)
V3P3 V3P3 voltage IOUT = 0 to 10 mA 3.1 3.3 3.52 V
LOGIC-LEVEL INPUTS (nSLEEP, ENx, INx)
VIL Input low voltage 0.6 0.7 V
VIH Input high voltage 2.2 5.25 V
VHYS Input hysteresis 50 600 mV
IIL Input low current VIN = 0 –5 5 µA
IIH Input high current VIN = 3.3 V 100 µA
RPD Pulldown resistance 100 kΩ
OPEN-DRAIN OUTPUTS (nFAULT and nCOMPO)
VOL Output low voltage IO = 5 mA 0.5 V
IOH Output high leakage current VO = 3.3 V 1 µA
COMPARATOR (COMPP, COMPN, nCOMPO)
VCM Common-mode input-voltage range 0 5 V
VIO Input offset voltage –7 7 mV
IIB Input bias current –300 300 nA
tR Response time 100-mV step with 10-mV overdrive 2 µs
H-BRIDGE FETs
rDS(on) High-side FET ON-resistance VM = 24 V, IO = 1 A, TJ = 25°C 0.24 Ω
VM = 24 V, IO = 1 A, TJ = 85°C(1) 0.29 0.39
Low-side FET ON-resistance VM = 24 V, IO = 1 A, TJ = 25°C 0.24 Ω
VM = 24 V, IO = 1 A, TJ = 85°C(1) 0.29 0.39
IOFF Off-state leakage current –2 2 µA
PROTECTION CIRCUITS
VUVLO VM undervoltage lockout voltage VM rising 6.3 8 V
IOCP Overcurrent protection trip level 3 5 A
tOCP Overcurrent protection deglitch time 5 µs
TTSD(1) Thermal shutdown temperature Die temperature 150 160 180 °C
THYS(1) Thermal shutdown hysteresis Die temperature 35 °C
(1) Specification based on design and characterization data

6.6 Switching Characteristics

TA = 25°C, VM = 24 V, RL = 20 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t1 Delay time, ENx high to OUTx high INx = 1 130 330 ns
t2 Delay time, ENx low to OUTx low INx = 1 275 475 ns
t3 Delay time, ENx high to OUTx low INx = 0 100 300 ns
t4 Delay time, ENx low to OUTx high INx = 0 200 400 ns
t5 Delay time, INx high to OUTx high ENx = 1 300 500 ns
t6 Delay time, INx low to OUTx low ENx = 1 275 475 ns
tr Output rise time, resistive load to GND 30 150 ns
tf Output fall time, resistive load to GND 30 150 ns
tDEAD(1) Output dead time 90 ns
(1) Specified by design and characterization data
DRV8313 T0543-01_SLVSBA5.gif Figure 1. DRV8313 Switching Characteristics

6.7 Typical Characteristics

DRV8313 D001_SLVSBA5.gif
Figure 2. Supply Current vs Supply Voltage
DRV8313 D003_SLVSBA5.gif
Figure 4. Sleep Current vs Supply Voltage
DRV8313 D005_SLVSBA5.gif
Figure 6. High-Side RDS(on) vs Supply Voltage (Normalized to 24 V, 25°C)
DRV8313 D007_SLVSBA5.gif
Figure 8. Low-Side RDS(on) vs Supply Voltage (Normalized to 24 V, 25°C)
DRV8313 D009_SLVSBA5.gif
Figure 10. V3P3 Regulator vs Load at VM = 24 V
DRV8313 D002_SLVSBA5.gif
Figure 3. Supply Current vs Temperature at VM = 24 V
DRV8313 D004_SLVSBA5.gif
Figure 5. Sleep Current vs Temperature at VM = 24 V
DRV8313 D006_SLVSBA5.gif
Figure 7. High-Side RDS(on) vs Temperature at VM = 24 V (Normalized to 25°C)
DRV8313 D008_SLVSBA5.gif
Figure 9. Low-Side RDS(on) vs Temperature at VM = 24 V (Normalized to 25°C)