SLVSBA3C June   2012  – December 2015 DRV8806

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Drivers
      2. 7.3.2 Protection Circuits
        1. 7.3.2.1 Overcurrent Protection (OCP)
        2. 7.3.2.2 Thermal Shutdown (TSD)
        3. 7.3.2.3 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Serial Interface Operation
      2. 7.4.2 Fault Output Register
      3. 7.4.3 Daisy-Chain Connection
      4. 7.4.4 nENBL and RESET Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Motor Voltage
        2. 8.2.2.2 Drive Current
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Power Dissipation
      2. 10.3.2 Heatsinking
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

PWP Package
16-Pin HTSSOP
Top View
DRV8806 pwp_pinout_lvsba3.gif

Pin Functions

PIN I/O(1) DESCRIPTION EXTERNAL COMPONENTS
OR CONNECTIONS
NAME NO.
POWER AND GROUND
GND 5, 12, PowerPAD™ — Device ground All pins must be connected to GND.
VM 1 — Device power supply Connect to motor supply (8.2 V - 40 V).
CONTROL
LATCH 11 I Latch input Rising edge latches shift register to output stage, falling edge latches fault data into output shift register – internal pulldown
nENBL 8 I Enable input Active low enables outputs – internal pulldown
RESET 9 I Reset input Active-high reset input initializes internal logic – internal pulldown
SCLK 13 I Serial clock Serial clock input – internal pulldown
SDATIN 14 I Serial data input Serial data input – internal pulldown
SDATOUT 15 OD Serial data output Serial data output; push-pull structure; see serial interface section for details
STATUS
nFAULT 16 OD Fault Logic low when in fault condition (overtemperature, overcurrent, open load) - open-drain output
OUTPUT
OUT1 3 O Output 1 Connect to load 1
OUT2 4 O Output 2 Connect to load 2
OUT3 6 O Output 3 Connect to load 3
OUT4 7 O Output 4 Connect to load 4
VCLAMP 2 — Output clamp voltage Connect to VM supply, or zener diode to VM supply
(1) Directions: I = input, O = output, OD = open-drain output.