SNLS340E November   2011  – November 2015 DS100KR800

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Electrical Characteristics - Serial Management Bus Interface
    7. 6.7 Timing Requirements - Serial Bus Interface Timing Specifications
    8. 6.8 Typical Characteristics
      1. 6.8.1 Electrical Performance
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Input Configuration Guidelines
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pin Control Mode
      2. 7.4.2 SMBUS Mode
    5. 7.5 Programming
      1. 7.5.1 SMBUS Master Mode
    6. 7.6 Register Maps
      1. 7.6.1 System Management Bus (SMBus) and Configuration Registers
        1. 7.6.1.1 Transfer of Data Through the SMBus
        2. 7.6.1.2 SMBus Transactions
        3. 7.6.1.3 Writing a Register
        4. 7.6.1.4 Reading a Register
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 3.3-V or 2.5-V Supply Mode Operation
    2. 9.2 Power Supply Bypassing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The DS100KR800 is a high-performance circuit capable of delivering excellent performance. Pay careful attention to the details associated with high-speed design as well as providing a clean power supply. Refer to the information below and Revision 4 of the LVDS Owner's Manual for more detailed information on high-speed design tips to address signal integrity design issues.

DS100KR800 30148030.gif Figure 7. Test Set-Up Connections Diagram
DS100KR800 30148033.gif Figure 8. Test Set-Up Connections Diagram

8.2 Typical Application

DS100KR800 30148080.gif Figure 9. Ethernet Backplane

8.2.1 Design Requirements

As with any high-speed design, there are many factors which influence the overall performance. Below are a list of critical areas for consideration and study during design.

  • Use 100-Ω impedance traces. Generally these are very loosely coupled to ease routing length differences.
  • Place AC-coupling capacitors near to the receiver end of each channel segment to minimize reflections.
  • The maximum body size for AC-coupling capacitors is 0402.
  • Back-drill connector vias and signal vias to minimize stub length.
  • Use Reference plane vias to ensure a low inductance path for the return current.

8.2.2 Detailed Design Procedure

The DS100KR800 is designed to be placed at an offset location with respect to the overall channel attenuation. In order to optimize performance, the repeater requires tuning to extend the reach of the cable or trace length while also recovering a solid eye opening. To tune the repeater, the settings mentioned in Table 2 and Table 3 are recommended as a default starting point for most applications. Once these settings are configured, additional tuning of the EQ and, to a lesser extent, VOD may be required to optimize the repeater performance for each specific application environment.

Examples of the repeater performance as a generic high-speed datapath repeater are shown in the performance curves in the Application Curves.

8.2.3 Application Curves

DS100KR800 30148031.png Figure 10. TL = 20 inch 4–mil FR4 Trace,
DS100KR800 Settings: EQ[1:0] = R, R = 15'h, DEM[1:0] = Float, Float
DS100KR800 30148034.png Figure 12. TL1 = 20 inch 4–mil FR4 Trace, TL2 = 15 inch 4–mil FR4 Trace,
DS100KR800 Settings: EQ[1:0] = R, R = 15'h, DEM[1:0] = Float, Float
DS100KR800 30148032.png Figure 11. TL = 30 inch 4–mil FR4 Trace,
DS100KR800 Settings: EQ[1:0] = Float, R = 1F'h, DEM[1:0] = Float, Float
DS100KR800 30148035.png Figure 13. TL1 = 30 inch 4–mil FR4 Trace, TL2 = 15 Inch 4–mil FR4 Trace,
DS100KR800 Settings: EQ[1:0] = Float, R = 1F'h, DEM[1:0] = Float, Float