SNLS477B October 2014 – November 2018 DS90UB948-Q1
BIST_CONTROL is described in Table 48.
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|7-6||BIST_OUT_MODE||R/W||0x0|| BIST Output Mode
00 : No toggling
01 : Alternating 1/0 toggling
1x : Toggle based on BIST data
|5-4||AUTO_OSC_FREQ||R/W||0x0|| When register 0x02 bit 5 (AUTO)CLOCK_EN) is set, this field controls the nominal frequency of the oscillator-based receive clock.
00: 50 MHz
01: 25 MHz
10: 10 MHz
11: Reserved (selects analog 25 MHz, but not for customer use)
|3||BIST_PIN_CONFIG||R/W||0x1|| Bist Configured through Pin.
1: Bist configured through pin.
0: Bist configured through bits 2:0 in this register
|2-1||BIST_CLOCK_SOURCE||R/W||0x0|| BIST Clock Source
This register field selects the BIST Clock Source at the Serializer. These register bits are automatically written to the CLOCK SOURCE bits (register offset 0x14) in the Serializer after BIST is enabled. See the appropriate Serializer register descriptions for details.
|0||BIST_EN||R/W||0x0|| BIST Control