SNLS477B October 2014 – November 2018 DS90UB948-Q1
SCL_HIGH_TIME is described in Table 50.
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|7-0||SCL_HIGH_TIME||R/W||0x83|| I2C Master SCL High Time
This field configures the high pulse width of the SCL output when the De-Serializer is the Master on the local I2C bus. Units are 50 ns for the nominal oscillator clock frequency. The default value is set to provide a minimum 5us SCL high time with the internal oscillator clock running at 26MHz rather than the nominal 20MHz.