SNOSD68 Data sheet

SNOSD68 June 2017 LM10-MIL

PRODUCTION DATA.

Package Options

Mechanical Data (Package|Pins)

LMG|8
- MMCC001A

Thermal pad, mechanical data (Package|Pins)

Orderable Information

snosd68_oa

6 Specifications

6.1 Absolute Maximum Ratings

See ⁽⁵⁾⁽¹⁾⁽⁶⁾

			MIN	MAX	UNIT
Total supply voltage				45	V
Differential input voltage⁽²⁾				±40	V
Power dissipation⁽³⁾			Internally limited
Output short-circuit duration⁽⁴⁾			Continuous
Lead temperature	TO	Soldering (10 seconds)		300	°C
	DIP	Soldering (10 seconds)		260	°C
		Vapor phase (60 seconds)		215	°C
		Infrared (15 seconds)		220	°C
Maximum junction temperature				150	°C
Storage temperature, T_stg			−55	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The Input voltage can exceed the supply voltages provided that the voltage from the input to any other terminal does not exceed the maximum differential input voltage and excess dissipation is accounted for when V_IN < V⁻.

(3) The maximum, operating-junction temperature is 150°C for the LM10-MIL. At elevated temperatures, devices must be derated based on package thermal resistance.

(4) Internal thermal limiting prevents excessive heating that could result in sudden failure, but the IC can be subjected to accelerated stress with a shorted output and worst-case conditions.

(5) Refer to RETS10X for LM10H military specifications.

(6) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.

6.2 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	NOM	MAX	UNIT
V_S	Supply input voltage range (V–) – (V+)	1.2		40	V
V_CM	Common-mode voltage	(V–)		(V+) – 0.85	V
V_REF	Reference voltage		0.2		V
I_REF	Reference current	0		1	mA

6.3 Thermal Information

THERMAL METRIC⁽¹⁾		LM10-MIL			UNIT
		NEV (SDIP)	NPA (SOIC)	P (PDIP)
		8 PINS	14 PINS	8 PINS
R_θJA	Junction-to-ambient thermal resistance	150	90	87	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	45	—	—	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.4 Electrical Characteristics

T_J=25°C unless otherwise specified⁽¹⁾

PARAMETER	TEST CONDITIONS		MIN	TYP	MAX	UNIT
Input offset voltage	T_J=25°C			0.3	2	mV
Input offset voltage	T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)				3	mV
Input offset current⁽²⁾	T_J=25°C			0.25	0.7	nA
Input offset current⁽²⁾	T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)				1.5	nA
Input bias current	T_J=25°C			10	20	nA
Input bias current	T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)				30	nA
Input resistance	T_J=25°C		250	500		kΩ
Input resistance	T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		150			kΩ
Large signal voltage gain	V_S = ±20 V, I_OUT = 0		120	400		V/mV
	V_OUT = ±19.95 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		80			V/mV
	V_S = ±20 V, V_OUT = ±19.4 V		50	130		V/mV
	I_OUT = ±20 mA, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		20			V/mV
	I_OUT = ±15 mA, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		20			V/mV
	V_S = ±0.6 V, I_OUT = ±2 mA		1.5	3		V/mV
	V_S = ±0.65 V, I_OUT = ±2 mA, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		1.5	3		V/mV
	V_OUT = ±0.4 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		0.5			V/mV
	V_OUT = ±0.3 V, V_CM = −0.4 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		0.5			V/mV
Shunt gain⁽³⁾	1.2 V ≤ V_OUT ≤ 40 V, R_L = 1.1 kΩ		14	33		V/mV
	1.3 V ≤ V_OUT ≤ 40 V, R_L = 1.1 kΩ, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		14	33		V/mV
	0.1 mA ≤ I_OUT ≤ 5 mA, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		6			V/mV
	1.5 V ≤ V⁺ ≤ 40 V, R_L = 250 Ω		8	25		V/mV
	0.1 mA ≤ I_OUT ≤ 20 mA, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		4			V/mV
Common-mode rejection	−20 V ≤ V_CM ≤ 19.15 V		93	102		dB
	−20 V ≤ V_CM ≤ 19 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		93	102		dB
	V_S = ±20 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		87			dB
Supply-voltage rejection	−0.2 V ≥ V⁻ ≥ −39 V		90	96		dB
	V⁺ = 1 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		84			dB
	V⁺ = 1.1 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		84			dB
	1 V ≤ V⁺ ≤ 39.8 V		96	106		dB
	1.1 V ≤ V⁺ ≤ 39.8 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		96	106		dB
	V⁻ = −0.2 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		90			dB
Offset voltage drift				2		μV/°C
Offset current drift				2		pA/°C
Bias current drift	T_C< 100°C			60		pA/°C
Line regulation	1.2 V ≤ V_S ≤ 40 V			0.001	0.003	%/V
	1.3 V ≤ V_S ≤ 40 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)			0.001	0.003	%/V
	0 ≤ I_REF ≤ 1 mA, V_REF = 200 mV, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)				0.006	%/V
Load regulation	0 ≤ I_REF ≤ 1 mA			0.01%	0.1%
	V⁺− V_REF ≥ 1 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)				0.15%
	V⁺− V_REF ≥ 1.1 V, T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)				0.15%
Amplifier gain	0.2 V ≤ V_REF ≤ 35 V	T_J=25°C	50	75		V/mV
Amplifier gain	0.2 V ≤ V_REF ≤ 35 V	T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)	23			V/mV
Feedback sense voltage	T_J=25°C		195	200	205	mV
Feedback sense voltage	T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)		194		206	mV
Feedback current	T_J=25°C			20	50	nA
Feedback current	T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)				65	nA
Reference drift				0.002		%/°C
Supply current	T_J=25°C			270	400	μA
Supply current	T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)				500	μA
Supply current change	1.2 V ≤ V_S ≤ 40 V	T_J=25°C		15		μA
	1.2 V ≤ V_S ≤ 40 V	T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)			75	μA
	1.3 V ≤ V_S ≤ 40 V	T_J=25°C		15		μA
	1.3 V ≤ V_S ≤ 40 V	T_MIN ≤ T_J ≤ T_MAX (see ⁽¹⁾)			75	μA

(1) These specifications apply for V⁻ ≤ V_CM ≤ V⁺− 0.85 V, 1 V (T_MIN ≤ T_J ≤ T_MAX), 1.2 V, 1.3 V (T_MIN ≤ T_J ≤ T_MAX) < V_S ≤ V_MAX, V_REF = 0.2 V and 0 ≤ I_REF ≤ 1 mA, unless otherwise specified: V_MAX = 40 V for the standard part and 6.5 V for the low voltage part. The full-temperature-range operation is −55°C to 125°C for the LM10-MIL. The specifications do not include the effects of thermal gradients (τ₁ ≃ 20 ms), die heating (τ₂ ≃ 0.2 s) or package heating. Gradient effects are small and tend to offset the electrical error (see curves).

(2) For T_J > 90°C, I_OS may exceed 1.5 nA for V_CM = V⁻. With T_J = 125°C and V⁻ ≤ V_CM ≤ V⁻ + 0.1 V, I_OS ≤ 5 nA.

(3) This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V⁺ terminal of the IC and input common mode is referred to V⁻ (see System Examples). Effect of larger output-voltage swings with higher load resistance can be accounted for by adding the positive-supply rejection error.