SNAS470E October   2008  – November 2015 LM48100Q-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics for VDD = 5 V
    6. 6.6  Electrical Characteristics for VDD = 5 V at Extended Temperature Limits
    7. 6.7  Electrical Characteristics for VDD = 3.6 V
    8. 6.8  Electrical Characteristics for VDD = 3.6 V at Extended Temperature Limits
    9. 6.9  I2C Interface Characteristics for VDD = 5 V, 2.2 V ≤ I2C VDD ≤ 5.5 V
    10. 6.10 I2C Interface Characteristics for VDD = 5 V, 1.8 V ≤ I2C VDD ≤ 2.2 V
    11. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Diagnostic Control
      2. 7.3.2 Fault Detection Control Register
      3. 7.3.3 General Amplifier Function
        1. 7.3.3.1 Bridge Configuration Explained
        2. 7.3.3.2 Input Mixer/Multiplexer
      4. 7.3.4 Output Fault Detection
        1. 7.3.4.1 Output Short to Supplies (VDD or GND)
        2. 7.3.4.2 Output Short Circuit and Open Circuit Detection
        3. 7.3.4.3 Output Over-Current Detection
        4. 7.3.4.4 Thermal Overload Detection
      5. 7.3.5 Open FAULT Output
      6. 7.3.6 Volume Control
      7. 7.3.7 Shutdown Function
      8. 7.3.8 Power Dissipation
    4. 7.4 Device Functional Modes
      1. 7.4.1 One-Shot Mode
      2. 7.4.2 Continuous Diagnostic Mode
    5. 7.5 Programming
      1. 7.5.1 Write-Only I2C Compatible Interface
      2. 7.5.2 I2C Bus Format
    6. 7.6 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Power Supply Bypassing/Filtering
        2. 8.2.2.2 Input Capacitor Selection
        3. 8.2.2.3 Bias Capacitor Selection
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Exposed DAP Mounting Considerations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

PWP Package
14-Pin HTSSOP with PowerPAD
Top View
LM48100Q-Q1 30075834.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 FAULT O Open-Drain output fault flag. FAULT = 0 indicates that a fault condition has occurred.
2 SCL I I2C Clock Input
3 SDA I/O I2C Serial Data Input
4 I2CVDD — I2C Interface Power Supply
5 GND — Ground
6 ADR I I2C Address Bit. Connect to I2CVDD to set address bit, B1 = 1. Connect to GND to set address bit B1 = 0
7 OUTA O Non-Inverting Audio Output
8 PGND — Power Ground
9 OUTB O Inverting Audio Output
10 PVDD — Output Amplifier Power Supply
11 IN2 I Audio Input 2
12 IN1 I Audio Input 1
13 BIAS — Bias Bypass
14 VDD — Power Supply
— Exposed Pad — Exposed paddle. Connect to GND.