SNVS333F November   2004  – September 2016 LM5107

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Performance Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Start-up and UVLO
      2. 7.3.2 Level Shift
      3. 7.3.3 Bootstrap Diode
      4. 7.3.4 Output Stages
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select Bootstrap and VDD capacitor
        2. 8.2.2.2 Select External Bootstrap Diode and Resistor
        3. 8.2.2.3 Select Gate Driver Resistor
      3. 8.2.3 Power Dissipation
      4. 8.2.4 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resource
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

See (1)(2)
MIN MAX UNIT
VDD to VSS -0.3 18 V
HB to HS -0.3 18 V
LI or HI to VSS -0.3 VDD +0.3 V
LO to VSS -0.3 VDD +0.3 V
HO to VSS VHS − 0.3 VHB + 0.3 V
HS to VSS(3) −5 100 V
HB to VSS 118 V
TJ Junction Temperature -40 150 °C
Tstg Storage Temperature Range −55 150 °C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is specified. Operating Ratings do not imply performance limits. For performance limits and associated test conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
(3) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed -1V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15V. For example, if VDD = 10V, the negative transients at HS must not exceed -5V.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM)(1) ±2000 V
(1) The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. Pin 6 , Pin 7 and Pin 8 are rated at 500V.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VDD 8 14 V
HS(1) −1 V to 100 V
HB VHS + 8 VHS + 14 V
HS Slew Rate < 50 V/ns
Junction Temperature −40 125 °C
(1) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed -1V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15V. For example, if VDD = 10V, the negative transients at HS must not exceed -5V.

6.4 Thermal Information

THERMAL METRIC(1) LM5107 UNIT
D (SOIC) NGT (WSON)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance (2) 109.6 38.9(3) °C/W
RθJC(top) Junction-to-case (top) thermal resistance 51.7 37.5 °C/W
RθJB Junction-to-board thermal resistance 50.4 15.9 °C/W
ψJT Junction-to-top characterization parameter 8.1 0.4 °C/W
ψJB Junction-to-board characterization parameter 49.8 16.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a 5 °C/W
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics application report.
(2) The θJA is not a constant for the package and depends on the printed circuit board design and the operating conditions.
(3) 4 layer board with Cu finished thickness 1.5/1/1/1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50 x 50mm ground and power planes embedded in PCB. See AN-1187 Leadless Leadframe Package (LLP) (SNOA401).

6.5 Electrical Characteristics

Unless otherwise specified, VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO. Typical limits are for TJ = +25°C, and minimum and maximum limits apply over the operating junction temperature range (–40°C to +125°C).
PARAMETER TEST CONDITIONS MIN(1) TYP MAX(1) UNIT
SUPPLY CURRENTS
IDD VDD Quiescent Current LI = HI = 0V 0.3 0.6 mA
IDDO VDD Operating Current f = 500 kHz 2.1 3.4 mA
IHB Total HB Quiescent Current LI = HI = 0V 0.06 0.2 mA
IHBO Total HB Operating Current f = 500 kHz 1.6 3 mA
IHBS HB to VSS Current, Quiescent VHS = VHB = 100V 0.1 10 µA
IHBSO HB to VSS Current, Operating f = 500 kHz 0.5 mA
INPUT PINS LI and HI
VIL Low Level Input Voltage Threshold 0.8 1.8 V
VIH High Level Input Voltage Threshold 1.8 2.2 V
RI Input Pulldown Resistance 100 180 500 kΩ
UNDER VOLTAGE PROTECTION
VDDR VDD Rising Threshold VDDR = VDD - VSS 6 6.9 7.4 V
VDDH VDD Threshold Hysteresis 0.5 V
VHBR HB Rising Threshold VHBR = VHB - VHS 5.7 6.6 7.1 V
VHBH HB Threshold Hysteresis 0.4 V
BOOT STRAP DIODE
VDL Low-Current Forward Voltage IVDD-HB = 100 µA
VDL = VDD - VHB		 0.58 0.9 V
VDH High-Current Forward Voltage IVDD-HB = 100 mA
VDH = VDD - VHB		 0.82 1.1 V
RD Dynamic Resistance IVDD-HB = 100 mA 0.8 1.5 Ω
LO GATE DRIVER
VOLL Low-Level Output Voltage ILO = 100 mA
VOHL = VLO – VSS		 0.28 0.45 V
VOHL High-Level Output Voltage ILO = −100 mA,
VOHL = VDD– VLO		 0.45 0.75 V
IOHL Peak Pullup Current VLO = 0V 1.3 A
IOLL Peak Pulldown Current VLO = 12V 1.4 A
HO GATE DRIVER
VOLH Low-Level Output Voltage IHO = 100 mA
VOLH = VHO– VHS		 0.28 0.45 V
VOHH High-Level Output Voltage IHO = −100 mA
VOHH = VHB– VHO		 0.45 0.75 V
IOHH Peak Pullup Current VHO = 0V 1.3 A
IOLH Peak Pulldown Current VHO = 12V 1.4 A
(1) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).

6.6 Switching Characteristics

Unless otherwise specified, VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO. Typical limits are for TJ = +25°C, and minimum and maximum limits apply over the operating junction temperature range (–40°C to +125°C).
Parameter CONDITIONS MIN(1) TYP MAX(1) UNIT
tLPHL Lower Turn-Off Propagation Delay
(LI Falling to LO Falling)		 27 56 ns
tHPHL Upper Turn-Off Propagation Delay
(HI Falling to HO Falling)		 27 56 ns
tLPLH Lower Turn-On Propagation Delay
(LI Rising to LO Rising)		 29 56 ns
tHPLH Upper Turn-On Propagation Delay
(HI Rising to HO Rising)		 29 56 ns
tMON Delay Matching: Lower Turn-On and Upper Turn-Off 2 15 ns
tMOFF Delay Matching: Lower Turn-Off and Upper Turn-On 2 15 ns
tRC, tFC Either Output Rise/Fall Time CL = 1000 pF 15 – ns
tPW Minimum Input Pulse Width that Changes the Output 50 ns
tBS Bootstrap Diode Turn-Off Time IF = 100 mA, IR = 100 mA 105 ns
(1) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
LM5107 20130018.gif Figure 1. Timing Diagram

6.7 Typical Performance Characteristics

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Figure 2. VDD Operating Current vs Frequency
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Figure 4. Operating Current vs Temperature
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Figure 6. Quiescent Current vs Voltage
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Figure 8. LO and HO High Level Output Voltage vs Temperature
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Figure 10. HO and LO Peak Output Current vs Output Voltage
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Figure 12. Undervoltage Rising Thresholds vs Temperature
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Figure 14. Input Thresholds vs Temperature
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Figure 3. HB Operating Current vs Frequency
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Figure 5. Quiescent Current vs Temperature
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Figure 7. Propagation Delay vs Temperature
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Figure 9. LO and HO Low Level Output Voltage vs Temperature
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Figure 11. Doide Forward Voltage
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Figure 13. Undervoltage Hysteresis vs Temperature
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Figure 15. Input Thresholds vs Supply Voltage