10.1 Layout Guidelines
The performance of switching converters heavily depends on the quality of the PCB layout. The following guidelines will help users design a PCB with the best power conversion performance, thermal performance, and minimize generation of unwanted EMI.
- Place Q1, D1, and RS first.
- Place ceramic COUT and make the switching loop (COUT-D1-Q1-RS-COUT) as small as possible.
- Leave copper area next to D1 for thermal dissipation.
- Place LM5150-Q1 close to RS.
- Place CPVCC as close to the device as possible between PVCC and PGND.
- Connect PGND directly to the center of the sense resistor using a wide and short trace.
- Connect CS to the center of the sense resistor. Connect through vias if required. Connect filter capacitor between CS pin and exposed pad.
- Connect AGND directly to the analog ground plain and connect to RSET, RT, and CCOMP.
- Connect the exposed pad to the analog ground plain and the power ground plain through vias.
- Connect LO directly to the gate of Q1.
- Make the switching signal loop (LO-Q1-RS-PGND-LO) as small as possible.
- Place CVOUT as close to the device as possible.
- The LM5150-Q1 has an exposed thermal pad to aid power dissipation. Adding several vias under the exposed pad helps conduct heat away from the device. Connect the vias to a large ground plane on the bottom layer.