SNVSAJ3B March   2016  – February 2017 LM5165-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Integrated Power MOSFETs
      2. 7.3.2  Selectable PFM or COT Mode Converter Operation
      3. 7.3.3  COT Mode Light-Load Operation
      4. 7.3.4  Low Dropout Operation and 100% Duty Cycle Mode
      5. 7.3.5  Adjustable Output Voltage (FB)
      6. 7.3.6  Adjustable Current Limit
      7. 7.3.7  Precision Enable (EN) and Hysteresis (HYS)
      8. 7.3.8  Power Good (PGOOD)
      9. 7.3.9  Configurable Soft Start (SS)
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode in COT
      4. 7.4.4 Active Mode in PFM
      5. 7.4.5 Sleep Mode in PFM
  8. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1: Wide VIN, Low IQ COT Converter Rated at 5 V, 150 mA
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 Switching Frequency - RT
          3. 8.2.1.2.3 Filter Inductor - LF
          4. 8.2.1.2.4 Output Capacitors - COUT
          5. 8.2.1.2.5 Series Ripple Resistor - RESR
          6. 8.2.1.2.6 Input Capacitor - CIN
          7. 8.2.1.2.7 Soft-Start Capacitor - CSS
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Design 2: Small Solution Size PFM Converter Rated at 3.3 V, 50 mA
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Peak Current Limit Setting - RILIM
          2. 8.2.2.2.2 Switching Frequency - LF
          3. 8.2.2.2.3 Output Capacitor - COUT
          4. 8.2.2.2.4 Input Capacitor - CIN
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Design 3: High Density 12-V, 75-mA PFM Converter
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1 Peak Current Limit Setting - RILIM
          2. 8.2.3.2.2 Switching Frequency - LF
          3. 8.2.3.2.3 Input and Output Capacitors - CIN, COUT
          4. 8.2.3.2.4 Feedback Resistors - RFB1, RFB2
          5. 8.2.3.2.5 Undervoltage Lockout Setpoint - RUV1, RUV2, RHYS
          6. 8.2.3.2.6 Soft Start - CSS
        3. 8.2.3.3 Application Curves
      4. 8.2.4 Design 4: 3.3-V, 150-mA COT Converter With High Efficiency
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Application Curves
      5. 8.2.5 Design 5: 15-V, 150-mA, 600-kHz COT Converter
        1. 8.2.5.1 Design Requirements
        2. 8.2.5.2 Detailed Design Procedure
          1. 8.2.5.2.1 COT Output Ripple Voltage Reduction
        3. 8.2.5.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Compact PCB Layout for EMI Reduction
      2. 10.1.2 Feedback Resistor Layout
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
      3. 11.1.3 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Applications and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The LM5165-Q1 only requires a few external components to convert from a wide range of supply voltages to a fixed output voltage. To expedite and streamline the process of designing of a LM5165-Q1-based converter, a comprehensive LM5165-Q1 Quick-start design tool is available for download to assist the designer with component selection for a given application. WEBENCH® online software is also available to generate complete designs, leveraging iterative design procedures and access to comprehensive component databases. The following sections discuss the design procedure for both COT and PFM modes using specific circuit design examples.

As mentioned previously, the LM5165-Q1 also integrates several optional features to meet system design requirements, including precision enable, UVLO, programmable soft start, programmable switching frequency in COT mode, adjustable current limit, and PGOOD indicator. Each application incorporates these features as needed for a more comprehensive design. The application circuits detailed below show LM5165-Q1 configuration options suitable for several application use cases. Refer to the LM5165EVM-HD-C50X and LM5165EVM-HD-P50A EVM user's guides for more detail.

Typical Applications

LM5165-Q1 TIDesignsLogo.png
For step-by-step design procedure, circuit schematics, bill of materials, PCB files, simulation and test results of an LM5165-powered implementation, refer to Field Transmitter with Bluetooth® Low Energy Connectivity Powered from 4 to 20-mA Current Loop reference design.

Design 1: Wide VIN, Low IQ COT Converter Rated at 5 V, 150 mA

The schematic diagram of a 5-V, 150-mA COT converter is given in Figure 37.

LM5165-Q1 App_schematic_5V_150mA_COT_nvsa47.gif Figure 37. Schematic for Design 1 With VIN(nom) = 12 V, VOUT = 5 V, IOUT(max) = 150 mA, FSW(nom) = 220 kHz

Design Requirements

The target full-load efficiency is 91% based on a nominal input voltage of 12 V and an output voltage of 5 V. The required input voltage range is 5 V to 65 V. The LM5165X-Q1 is chosen to deliver a fixed 5-V output voltage. The switching frequency is set by resistor RRT at 220 kHz. The output voltage soft-start time is 6 ms. The required components are listed in Table 2.

Table 2. List of Components for Design 1

REF DES QTY SPECIFICATION VENDOR PART NUMBER
CIN 1 1 µF, 100 V, X7R, 1206 ceramic TDK C3216X7R2A105K160AA
COUT 1 22 µF, 10 V, X7R, 1206 ceramic Murata GRM31CR71A226KE15L
LF 1 220 µH ±20%, 0.29 A, 0.92 Ω typ DCR, 5.8 x 5.8 x 2.8 mm Würth Electronik WE-TPC 5828 744053221
220 µH ±30%, 0.3 A, 1.25 Ω max DCR, 5.8 x 5.8 x 3.0 mm Bourns SRR5028-221Y
RESR 1 1.5 Ω, 5%, 0402 Std Std
RRT 1 133 kΩ, 1%, 0402 Std Std
CSS 1 47 nF, 10 V, X7R, 0402 ceramic Std Std
U1 1 LM5165X-Q1 Synchronous Buck Converter, VSON-10, 5V Fixed TI LM5165XQDRCRQ1

Detailed Design Procedure

Custom Design With WEBENCH® Tools

Click here to create a custom design using the LM5165-Q1 device with the WEBENCH® Power Designer.

  1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
  2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
  3. Compare the generated design with other possible solutions from Texas Instruments.

The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability.

In most cases, these actions are available:

  • Run electrical simulations to see important waveforms and circuit performance
  • Run thermal simulations to understand board thermal performance
  • Export customized schematic and layout into popular CAD formats
  • Print PDF reports for the design, and share the design with colleagues

Get more information about WEBENCH tools at www.ti.com/WEBENCH.

Switching Frequency – RT

As mentioned, the switching frequency of a COT-configured LM5165-Q1 is set by the on-time programming resistor at the RT pin. As shown by Equation 2, a standard 1% resistor of 133 kΩ gives a switching frequency of 230 kHz.

Note that at very low duty cycles, the minimum controllable on-time of the high-side MOSFET, TON(min), of 180 ns may affect choice of switching frequency. In CCM, TON(min) limits the voltage conversion step-down ratio for a given switching frequency. The minimum controllable duty cycle is given by Equation 9:

Equation 9. LM5165-Q1 q_Dmin_eg_nvsa47.gif

Given a fixed TON(min), it follows that higher switching frequency implies a larger minimum controllable duty cycle. Ultimately, the choice of switching frequency for a given output voltage affects the available input voltage range, solution size and efficiency. The maximum supply voltage for a given TON(min) before switching frequency reduction occurs is given by Equation 10.

Equation 10. LM5165-Q1 q_VINmax_eg_nvsa47.gif

Filter Inductor – LF

The inductor ripple current (assuming CCM operation) and peak inductor current are given respectively by Equation 11 and Equation 12.

Equation 11. LM5165-Q1 q_delta_IL_COT_nvsa47.gif
Equation 12. LM5165-Q1 q_IL_COT_nvsa47.gif

For most applications, choose an inductance such that the inductor ripple current, ΔIL, is between 30% and 50% of the rated load current at nominal input voltage. Calculate the inductance using Equation 13.

Equation 13. LM5165-Q1 q_LF_COT_nvsa47.gif

Choosing a 220-µH inductor in this design results in 55-mA peak-to-peak ripple current at nominal input voltage of 12 V, equivalent to 37% of the 150-mA rated load current. The peak inductor current at maximum input voltage of 65 V is 195 mA, sufficiently below the LM5165-Q1 peak current limit of 240 mA.

Check the inductor datasheet to ensure that the inductor's saturation current is well above the current limit setting of a particular design. Ferrite designs have low core loss and are preferred at high switching frequencies, so design goals can then concentrate on copper loss and preventing saturation. However, ferrite core materials exhibit a hard saturation characteristic – the inductance collapses abruptly when the saturation current is exceeded. This results in an abrupt increase in inductor ripple current, higher output voltage ripple, not to mention reduced efficiency and compromised reliability. Note that inductor saturation current generally deceases as the core temperature increases.

Output Capacitors – COUT

Select the output capacitor to limit the capacitive voltage ripple at the converter output. This is the sinusoidal ripple voltage that arises from the triangular ripple current flowing in the capacitor. Select an output capacitance using Equation 14 to limit the voltage ripple component to 0.5% of the output voltage.

Equation 14. LM5165-Q1 q_Cout_COT_nvsa47.gif

Substituting ΔIL(nom) of 55 mA gives COUT greater than 5 μF. Mindful of the voltage coefficient of ceramic capacitors, select a 22-µF, 10-V capacitor with X7R dielectric in 1206 footprint.

Series Ripple Resistor – RESR

Select a series resistor such that sufficient ripple in phase with the SW node voltage appears at the feedback node, FB. Use Equation 15 to calculate the required ripple resistance, designated RESR.

Equation 15. LM5165-Q1 q_Resr_COT_nvsa47.gif

With VOUT of 5 V, VREF of 1.223 V, and ΔIL(nom) of 55 mA at the nominal input voltage of 12 V, the required RESR is 1.5 Ω. Calculate the total output voltage ripple in CCM using Equation 16.

Equation 16. LM5165-Q1 q_delta_Vout_COT_nvsa47.gif

Input Capacitor – CIN

An input capacitor is necessary to limit the input ripple voltage while providing switching-frequency AC current to the buck power stage. To minimize the parasitic inductance in the switching loop, position the input capacitors as close as possible to the VIN and GND pins of the LM5165-Q1. The input capacitors conduct a square-wave current of peak-to-peak amplitude equal to the output current. It follows that the resultant capacitive component of AC ripple voltage is a triangular waveform. Together with the ESR-related ripple component, the peak-to-peak ripple voltage amplitude is given by Equation 17.

Equation 17. LM5165-Q1 q_delta_Vin_COT_nvsa47.gif

The input capacitance required for a particular load current, based on an input voltage ripple specification of ΔVIN, is given by Equation 18.

Equation 18. LM5165-Q1 q_Cin_COT_nvsa47.gif

The recommended high-frequency capacitance is 1 µF or higher and should be a high-quality ceramic type X5R or X7R with sufficient voltage rating. Based on the voltage coefficient of ceramic capacitors, choose a voltage rating of twice the maximum input voltage. Additionally, some bulk capacitance is required if the LM5165-Q1 circuit is not located within approximately 5 cm from the input voltage source. This capacitor provides damping to the resonance associated with parasitic inductance of the supply lines and high-Q ceramics.

Soft-Start Capacitor – CSS

Connect an external soft-start capacitor for a specific soft-start time. In this example, select a soft-start capacitance of 47 nF based on Equation 8 to achieve a soft-start time of 6 ms.

Application Curves

Unless otherwise stated, application performance curves were taken at TA = 25°C.

LM5165-Q1 D102_snvsa47.gif
VOUT = 5 V
Figure 38. Efficiency
LM5165-Q1 CISPR22_filtered_5V_100mA_COT_nvsa47.gif
VIN = 13.5 V
IOUT = 100 mA
LIN = 22 µH
CIN(EXT) = 10 µF
Figure 40. EMI Plot – CISPR 22 Filtered Emissions
LM5165-Q1 Ripple_12Vin_5V_150mA_nvsa47.gif
VIN = 12 V IOUT = 150 mA
Figure 42. SW Node and Output Ripple Voltage, Full Load
LM5165-Q1 Startup_24Vin_5V_150mA_nvsa47.gif
VIN stepped to 24 V 30-Ω Load
Figure 44. Startup, Full Load
LM5165-Q1 Dropout_5V_75mA_nvsa47.gif
VIN brownout to 3.2 V
Figure 46. Dropout Performance, 75-mA Resistive Load
LM5165-Q1 Load_transient_5Vout_150mA_nvsa47.gif
VIN = 24 V
Figure 48. Load Transient, 50 mA to 150 mA, 1 A/µs
LM5165-Q1 D005_snvu474.gif
Figure 39. Load Regulation
LM5165-Q1 Ripple_24Vin_5V_no_load_nvsa47.gif
VIN = 12 V IOUT = 0 mA
Figure 41. SW Node and Output Ripple Voltage, No Load
LM5165-Q1 Ripple_5V7Vin_5V_150mA_nvsa47.gif
VIN = 5.7 V IOUT = 150 mA
Figure 43. SW Node and Output Ripple Voltage Showing Frequency Foldback Near Dropout
LM5165-Q1 EN_ON_OFF_5V_150mA_nvsa47.gif
VIN = 24 V 30-Ω Load
Figure 45. Enable ON and OFF
LM5165-Q1 Dropout_5V_150mA_nvsa47.gif
VIN brownout to 3.2 V
Figure 47. Dropout Performance, 150-mA Resistive Load
LM5165-Q1 cold_crank_5V_150mA_nvsa47.gif
IOUT = 150 mA
Figure 49. Input Transient (Automotive Cold Crank Profile)

Design 2: Small Solution Size PFM Converter Rated at 3.3 V, 50 mA

The schematic diagram of a 3.3-V, 50-mA PFM converter with minimum component count is given in Figure 50.

LM5165-Q1 App_schematic_3.3V_50mA_PFM_nvsa47_v3.gif Figure 50. Schematic for Design 2 With VIN(nom) = 12 V, VOUT = 3.3 V, IOUT(max) = 50 mA, FSW(nom) = 350 kHz

Design Requirements

The target full-load efficiency of this design is 88% based on a nominal input voltage of 12 V and an output voltage of 3.3 V. The required total input voltage range is 3.5 V to 65 V. The LM5165-Q1 has an internally-set soft-start time of 900 µs and an adjustable peak current limit threshold. The BOM is listed in Table 3.

Table 3. List of Components for Design 2

REF DES QTY SPECIFICATION VENDOR PART NUMBER
CIN 1 1 µF, 100 V, X7S, 0805 ceramic TDK C2012X7S2A474M125AE
COUT 1 10 µF, 6.3 V, X7R, 0805 ceramic Taiyo Yuden JMK212AB7106KG-T
Murata GRM21BR70J106KE76K
LF 1 47 µH ±20%, 0.56 A, 650 mΩ maximum DCR, 3.9 × 3.9 × 1.7 mm Coilcraft LPS4018-473MRC
47 µH ±20%, 0.7 A, 620 mΩ typical DCR, 4.0 × 4.0 × 1.8 mm Würth 74404042470
47 µH ±20%, 0.57 A, 650 mΩ typical DCR, 4.0 × 4.0 × 1.8 mm Taiyo Yuden NR4018T470M
RILIM 1 56.2 kΩ, 1%, 0402 Std Std
U1 1 LM5165Y-Q1 Synchronous Buck Converter, VSON-10, 3.3-V Fixed TI LM5165YQDRCRQ1

Detailed Design Procedure

Peak Current Limit Setting – RILIM

Install a 56.2-kΩ resistor from ILIM to GND to select a 120-mA peak current limit threshold setting to meet the rated output current of 50 mA.

Switching Frequency – LF

Tie RT to GND to select PFM mode of operation. The inductor, input voltage, output voltage, and peak current determine the pulse switching frequency of a PFM-configured LM5165-Q1. For a given input voltage, output voltage and peak current, the inductance of LF sets the switching frequency when the output is in regulation. Use Equation 19 to select an inductance of 47 µH based on the target PFM converter switching frequency of 350 kHz at 12-V input.

Equation 19. LM5165-Q1 q_LF_eqn_PFM_nvsa47.gif

IPK(PFM) in this example is the peak current limit setting of 120 mA plus an additional 10% margin added to include the effect of the 100-ns peak current comparator delay. An additional constraint on the inductance is the 180-ns minimum on-time of the high-side MOSFET. Therefore, to keep the inductor current well controlled, choose an inductance that is larger than LF(min) using Equation 20 where VIN(max) is the maximum input supply voltage for the application, tON(min) is 180 ns, and IL(max) is the maximum allowed peak inductor current.

Equation 20. LM5165-Q1 q_LFmin_PFM_nvsa47.gif

Choose an inductor with saturation current rating above the peak current limit setting, and allow for derating of the saturation current at the highest expected operating temperature.

Output Capacitor – COUT

The output capacitor, COUT, filters the inductor’s ripple current and stores energy to meet the load current requirement when the LM5165-Q1 is in sleep mode. The output ripple has a base component of amplitude VOUT/123 related to the 10-mV typical feedback comparator hysteresis in PFM. The wakeup time from sleep to active mode adds a ripple voltage component that is a function of the output current. Approximate the total output ripple by Equation 21.

Equation 21. LM5165-Q1 q_deltaCout_PFM_nvsa47.gif

Also, the output capacitance must be large enough to accept the energy stored in the inductor without a large deviation in output voltage. Setting this voltage change equal to 0.5% of the output voltage results in:

Equation 22. LM5165-Q1 q_Cout_min_PFM_nvsa47.gif

In general, select the capacitance of COUT to limit the output voltage ripple at full load current, ensuring that it is rated for worst-case RMS ripple current given by IRMS = IPK(PFM)/2. In this design example, choose a 10-µF, 6.3-V ceramic output capacitor with X7R dielectric and 0805 footprint.

Input Capacitor – CIN

The input capacitor, CIN, filters the high-side MOSFET's triangular current waveform, see Figure 72. To prevent large ripple voltage, use a low-ESR ceramic input capacitor sized for the worst-case RMS ripple current given by IRMS = IOUT/2. In this design example, choose a 1-µF, 100-V ceramic input capacitor with X7S dielectric and 0805 footprint.

Application Curves

LM5165-Q1 D103_snvsa47.gif
VOUT = 3.3 V
Figure 51. Efficiency
LM5165-Q1 Startup_3V3_50mA_nvsa47.gif
VIN stepped to 12 V 66-Ω Load
Figure 53. Start-Up, Full Load
LM5165-Q1 Load_Transient_3V3_50mA_nvsa47.gif
VIN = 12 V
Figure 55. Load Transient, 0 mA to 50 mA, 1 A/µs
LM5165-Q1 Ripple_3V3_50mA_nvsa47.gif
VIN = 12 V IOUT = 50 mA
Figure 52. SW Node and Output Ripple Voltage, Full Load
LM5165-Q1 EN_ON_OFF_3V3_50mA_nvsa47.gif
VIN = 12 V 66-Ω Load
Figure 54. Enable ON and OFF
LM5165-Q1 cold_crank_3V3_50mA_nvsa47.gif
IOUT = 50 mA
Figure 56. Input Voltage Transient (Automotive Cold Crank Profile)

Design 3: High Density 12-V, 75-mA PFM Converter

The schematic diagram of 12-V, 75-mA PFM converter is given in Figure 57.

LM5165-Q1 App_schematic_12V_75mA_PFM_nvsa47.gif Figure 57. Schematic for Design 3 With VIN(nom) = 24 V, VOUT = 12 V, IOUT(max) = 75 mA, FSW(nom) = 500 kHz

Design Requirements

The full-load efficiency specification is 92% based on a nominal input voltage of 24 V and an output voltage of 12 V. The total input voltage range is 18 V to 65 V, with UVLO turnon and turnoff at 16 V and 14.5 V, respectively. The output voltage setpoint is established by feedback resistors, RFB1 and RFB2. The switching frequency is set by inductor LF at 500 kHz at nominal input voltage. The required components are listed in Table 4.

Table 4. List of Components for Design 3

REF DES QTY SPECIFICATION VENDOR PART NUMBER
CIN 1 1 µF, 100 V, X7S, 0805 ceramic Murata GRJ21BC72A105KE11L
1 µF, 100 V, X7S, 0805 ceramic, AEC-Q200 TDK CGA4J3X7S2A105K125AE
COUT 1 10 µF, 16 V, X7R, 0805 ceramic Taiyo Yuden EMK212BB7106MG-T
10 µF, 16 V, X7R, 0805 ceramic, AEC-Q200 TDK CGA4J1X7S1C106K125AC
LF 1 47 µH ±20%, 0.56 A, 650 mΩ maximum DCR, 3.9 × 3.9 × 1.7 mm
AEC-Q200
Coilcraft LPS4018-473MRC
RILIM 1 24.9 kΩ, 1%, 0402 Std Std
RFB1 1 1 MΩ, 1%, 0402 Std Std
RFB2 1 113 kΩ, 1%, 0402 Std Std
RUV1 1 10 MΩ, 1%, 0603 Std Std
RUV2 1 825 kΩ, 1%, 0402 Std Std
RHYS 1 37.4 kΩ, 1%, 0402 Std Std
CSS 1 22 nF, 10 V, X7R, 0402 Std Std
U1 1 LM5165-Q1 Synchronous Buck Converter, VSON-10, 3 mm × 3 mm TI LM5165QDRCRQ1

Detailed Design Procedure

The component selection procedure for this PFM design is quite similar to that of Design 2, see Figure 50.

Peak Current Limit Setting – RILIM

Install a 24.9-kΩ resistor from ILIM to GND to select the 180-mA peak current limit setting for a rated output current of 75 mA.

Switching Frequency – LF

Tie RT to GND to select PFM mode of operation. Set the switching frequency by the filter inductance, LF. Calculate an inductance of 47 µH based on the target PFM converter switching frequency of 500 kHz at 24-V input using Equation 19. Use a peak current limit setting, IPK(PFM), of 180 mA plus an additional 50% margin in this high-frequency design to include the effect of the 100-ns current limit comparator delay. Choose an inductor with saturation current rating well above the peak current limit setting, and allow for derating of the saturation current at the highest expected operating temperature.

Input and Output Capacitors – CIN, COUT

Choose a 1-µF, 100-V ceramic input capacitor with 0805 footprint. Such a capacitor is typically available in X5R or X7S dielectric. Based on Equation 22, select a 10-µF, 16-V ceramic output capacitor with X7R dielectric and 0805 footprint.

Feedback Resistors – RFB1, RFB2

The output voltage of the LM5165-Q1 is externally adjustable using a resistor divider network. The divider network comprises the upper feedback resistor RFB1 and lower feedback resistor RFB2. Select RFB1 of 1 MΩ to minimize quiescent current and improve light-load efficiency in this application. With the desired output voltage setpoint of 12 V and VFB = 1.223 V, calculate the resistance of RFB2 using Equation 5 as 113.5 kΩ. Choose the closest available standard value of 113 kΩ for RFB2. Please refer to Adjustable Output Voltage (FB) for more detail.

Undervoltage Lockout Setpoint – RUV1, RUV2, RHYS

Adjust the undervoltage lockout (UVLO) using an externally-connected resistor divider network of RUV1, RUV2, and RHYS. The UVLO has two thresholds, one for power up when the input voltage is rising and one for power down or brownouts when the input voltage is falling. The EN rising threshold for the LM5165-Q1 is 1.212 V.

Rearranging Equation 6 and Equation 7, the expressions to calculate RUV2 and RHYS are as follows:

Equation 23. LM5165-Q1 q_Ruv2_nvsa47.gif
Equation 24. LM5165-Q1 q_Rhys_nvsa47.gif

Choose RUV1 as 10 MΩ to minimize input quiescent current. Given the desired input voltage UVLO thresholds of 16 V and 14.5 V, calculate the resistance of RUV2 and RHYS as 825 kΩ and 37.4 kΩ, respectively. See Precision Enable (EN) and Hysteresis (HYS) for more detail.

Soft Start – CSS

Install a 22-nF capacitor from SS to GND for a soft-start time of 3 ms.

Application Curves

LM5165-Q1 D105_snvsa47.gif
VOUT = 12 V
Figure 58. Efficiency
LM5165-Q1 Ripple_12V_75mA_nvsa47.gif
VIN = 24 V IOUT = 75 mA
Figure 60. SW Node and Output Ripple Voltage, Full Load
LM5165-Q1 Startup_12V_75mA_nvsa47.gif
VIN stepped to 24 V 160-Ω Load
Figure 59. Start-Up, Full Load
LM5165-Q1 Ripple_no_load_12V_75mA_nvsa47.gif
VIN = 24 V IOUT = 0 mA
Figure 61. SW Node and Output Ripple Voltage, No Load

Design 4: 3.3-V, 150-mA COT Converter With High Efficiency

The schematic diagram of a 3.3-V, 150-mA COT converter is given in Figure 62.

LM5165-Q1 App_schematic_3V3_150mA_COT_nvsa47.gif Figure 62. Schematic for Design 4 With VIN(nom) = 24 V, VOUT = 3.3 V, IOUT(max) = 150 mA, FSW(nom) = 160 kHz

Design Requirements

The target full-load efficiency is 91% based on a nominal input voltage of 24 V and an output voltage of 3.3 V. The required input voltage range is 3 V to 65 V. The LM5165Y-Q1 is chosen to deliver a fixed 3.3-V output voltage. The switching frequency is set by resistor RRT at approximately 160 kHz. The output voltage soft-start time is 4 ms. The required components are listed in Table 5. The component selection procedure for this COT design is quite similar to that of Design 1, see Figure 37.

Table 5. List of Components for Design 4

REF DES QTY SPECIFICATION VENDOR PART NUMBER
CIN 1 1 µF, 100 V, X7R, 1206 ceramic Murata GRM31CR72A105KA01L
COUT 1 22 µF, 6.3 V, X7S, 0805 ceramic Murata GRM21BR660J226ME39K
LF 1 150 µH ±20%, 0.29 A, 0.86 Ω typical DCR, 4.8 × 4.8 × 2.9 mm Coilcraft LPS5030-154MLC
RESR 1 0.5 Ω, 5%, 0402 Std Std
RRT 1 121 kΩ, 1%, 0402 Std Std
CSS 1 33 nF, 10 V, X7R, 0402 ceramic Std Std
U1 1 LM5165Y-Q1 Synchronous Buck Converter, VSON-10, 3.3-V Fixed TI LM5165YQDRCRQ1

Application Curves

LM5165-Q1 D104_snvsa47.gif Figure 63. Efficiency
LM5165-Q1 Ripple_24Vin_3.3V_150mA_nvsa47.gif
VIN = 24 V IOUT = 150 mA
Figure 64. SW Node and Output Ripple Voltages, Full Load

Design 5: 15-V, 150-mA, 600-kHz COT Converter

The schematic diagram of a 15-V, 150-mA COT converter is given in Figure 65.

LM5165-Q1 App_schematic_15V_150mA_COT_nvsa47.gif Figure 65. Schematic for Design 5 With VIN(nom) = 36 V, VOUT = 15 V, IOUT(max) = 150 mA, FSW(nom) = 600 kHz

Design Requirements

The target full-load efficiency is 92% based on a nominal input voltage of 36 V and an output voltage of 15 V. The input voltage operating range is 24 V to 48 V, but transients as high as 65 V are possible in the application. UVLO turnon and turnoff are set at 19 V and 17 V, respectively. The LM5165-Q1 switching frequency is set at approximately 600 kHz by resistor RRT of 143 kΩ. The output voltage soft-start time is 6 ms. The required components are listed in Table 6. The component selection procedure for this COT design is quite similar to that of Design 1, see Figure 37.

Table 6. List of Components for Design 5

REF DES QTY SPECIFICATION VENDOR PART NUMBER
CIN 1 1 µF, 100 V, X7R, 1206 ceramic AVX 12061C105KAT2A
COUT 1 10 µF, 25 V, X7R, 1206 ceramic Taiyo Yuden TMK316B7106KL-TD
LF 1 150 µH ±20%, 0.29 A, 0.86 Ω typical DCR, 4.8 × 4.8 × 2.9 mm Coilcraft LPS5030-154MLC
RESR 1 2.2 Ω, 5%, 0402 Std Std
RRT 1 143 kΩ, 1%, 0402 Std Std
RFB1 1 499 kΩ, 1%, 0402 Std Std
RFB2 1 44.2 kΩ, 1%, 0402 Std Std
RUV1 1 10 MΩ, 1%, 0603 Std Std
RUV2 1 681 kΩ, 1%, 0402 Std Std
RHYS 1 40.2 kΩ, 1%, 0402 Std Std
CFF 1 10 pF, 10 V, X7R, 0402 ceramic Std Std
CSS 1 47 nF, 10 V, X7R, 0402 ceramic Std Std
U1 1 LM5165-Q1 Synchronous Buck Converter, VSON-10, 3 mm × 3 mm TI LM5165QDRCRQ1

Detailed Design Procedure

COT Output Ripple Voltage Reduction

Depending on the required ripple resistance when operating in COT mode, the resultant output voltage ripple may be deemed too high for a given application. One option is to place a feedforward capacitor CFF in parallel with the upper feedback resistor RFB1. Capacitor CFF increases the high-frequency gain from VOUT to VFB close to unity such that the output voltage ripple couples directly to the FB node.

Application Curves

LM5165-Q1 D106_snvsa47.gif
VOUT = 15 V
Figure 66. Efficiency
LM5165-Q1 Ripple_36Vin_12V_150mA_nvsa47.gif
VIN = 36 V IOUT = 150 mA
Figure 68. SW Node and Output Ripple Voltage, Full Load
LM5165-Q1 EN_ON_OFF_12V_150mA_nvsa47.gif
VIN = 36 V
Figure 70. Enable ON and OFF
LM5165-Q1 Startup_36Vin_12V_150mA_nvsa47.gif
VIN stepped to 36 V IOUT = 150 mA
Figure 67. Start-Up, Full Load
LM5165-Q1 Ripple_36Vin_12V_0mA_nvsa47.gif
VIN = 36 V IOUT = 0 mA
Figure 69. SW Node and Output Ripple Voltage, No Load
LM5165-Q1 Short_rec_36Vin_12V_150mA_nvsa47.gif
VIN = 36 V
Figure 71. Short Circuit Recovery