SNIS153D July   2009  – October 2015 LM75B

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Temperature-to-Digital Converter Characteristics
    6. 6.6 Digital DC Characteristics
    7. 6.7 I2C Digital Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Digital Temperature Sensor
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 I2C Bus Interface
      2. 7.5.2 Temperature Data Format
      3. 7.5.3 Shutdown Mode
      4. 7.5.4 Fault Queue
      5. 7.5.5 Comparator and Interrupt Mode
      6. 7.5.6 O.S. Output
      7. 7.5.7 O.S. Polarity
      8. 7.5.8 Internal Register Structure
    6. 7.6 Register Maps
      1. 7.6.1 Pointer Register (Selects Which Registers Will Be Read From or Written to):
      2. 7.6.2 Temperature Register (Read Only):
      3. 7.6.3 Configuration Register (Read/Write):
      4. 7.6.4 THYST and TOS Register (Read/Write):
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Simple Fan Controller, Interface Optional
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 Simple Thermostat, Interface Optional
      2. 8.3.2 Temperature Sensor with Loudmouth Alarm (Barking Watchdog)
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Digital Noise Issues
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply Voltage Pin (+VS) −0.3 6.5 V
Voltage at A0, A1and A2 Pins −0.3 (+VS + 0.3) and must be ≤ 6.5 V
Voltage at O.S., SCL and SDA Pins −0.3 6.5 V
Input Current at any Pin(2) 5 mA
Package Input Current(2) 20 mA
O.S. Output Sink Current 10 mA
Storage temperature, Tstg –65 150 °C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its rated operating conditions.
(2) When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > +VS) the current at that pin should be limited to 5 mA. The 20-mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four.

6.2 ESD Ratings

VALUE UNIT
LM75B
V(ESD) Electrostatic discharge(1) Human-body model (HBM) ±2500 V
Machine model ±250
LM75C
V(ESD) Electrostatic discharge(1) Human-body model (HBM) ±1500 V
Machine Model ±100
(1) Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine model, 200 pF discharged directly into each pin. The Charged Device Model (CDM) is a specified circuit characterizing an ESD event that occurs when a device acquires charge through some triboelectric (frictional) or electrostatic induction processes and then abruptly touches a grounded object or surface.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
Specified Temperature Range TMIN TMAX
–55 125 °C
Supply Voltage Range (+VS) LM75B, LM75C 3 5.5 V
(1) Soldering process must comply with Texas Instruments Incorporated Reflow Temperature Profile specifications. Refer to
(2) Reflow temperature profiles are different for lead-free and non-lead-free packages.

6.4 Thermal Information

THERMAL METRIC(1) LM75B UNIT
D (SOIC) DGK (VSSOP)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 115.2 158.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 62.2 52.3 °C/W
RθJB Junction-to-board thermal resistance 56.4 78.8 °C/W
ψJT Junction-to-top characterization parameter 10.2 5.3 °C/W
ψJB Junction-to-board characterization parameter 55.8 77.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Temperature-to-Digital Converter Characteristics

Unless otherwise noted, these specifications apply for: +VS = 5 Vdc for LM75BIM-5, LM75BIMM-5, LM75CIM-5, and LM75CIMM-5; and +VS = 3.3 Vdc for LM75BIM-3, LM75BIMM-3, LM75CIM-3, and LM75CIMM-3(1). TA = TJ = 25°C, unless otherwise noted.(2)
PARAMETER TEST CONDITIONS MIN(4) TYP(3) MAX(4) UNIT
Accuracy TA = −25°C to 100°C –2 2 °C
TA = −55°C to 125°C –3 3
Resolution 9 Bits
Temperature Conversion Time See(5) 100 ms
See(5), –55°C ≤ TA ≤ 125°C 300
Quiescent Current LM75B I2C Inactive 0.25 mA
I2C Inactive, –55°C ≤ TA ≤ 125°C 0.5
Shutdown Mode, +VS = 3 V 4 μA
Shutdown Mode, +VS = 5 V 6
LM75C I2C Inactive 0.25 mA
I2C Inactive, –55°C ≤ TA ≤ 125°C 1
Shutdown Mode, +VS = 3 V 4 μA
Shutdown Mode, +VS = 5 V 6
O.S. Output Saturation Voltage IOUT = 4.0 mA, –55°C ≤ TA ≤ 125°C 0.8 V
O.S. Delay See (6), –55°C ≤ TA ≤ 125°C 1 6 Conversions
TOS Default Temperature See (7) 80 °C
THYST Default Temperature 75
(1) All part numbers of the LM75 will operate properly over the +VS supply voltage range of 3 V to 5.5 V. The devices are tested and specified for rated accuracy at their nominal supply voltage. Accuracy will typically degrade 1°C/V of variation in +VS as it varies from the nominal value.
(2) For best accuracy, minimize output loading. Higher sink currents can affect sensor accuracy with internal heating. This can cause an error of 0.64°C at full rated sink current and saturation voltage based on junction-to-ambient thermal resistance.
(3) Typicals are at TA = 25°C and represent most likely parametric norm.
(4) Limits are specified to AOQL (Average Outgoing Quality Level).
(5) The conversion-time specification is provided to indicate how often the temperature data is updated. The LM75 can be accessed at any time and reading the Temperature Register will yield result from the last temperature conversion. When the LM75 is accessed, the conversion that is in process will be interrupted and it will be restarted after the end of the communication. Accessing the LM75 continuously without waiting at least one conversion time between communications will prevent the device from updating the Temperature Register with a new temperature conversion result. Consequently, the LM75 should not be accessed continuously with a wait time of less than 300 ms.
(6) O.S. Delay is user programmable up to 6 “over limit” conversions before O.S. is set to minimize false tripping in noisy environments.
(7) Default values set at power up.

6.6 Digital DC Characteristics

Unless otherwise noted, these specifications apply for +VS = 5 Vdc for LM75BIM-5, LM75BIMM-5, LM75CIM-5, and LM75CIMM-5; and +VS = 3.3 Vdc for LM75BIM-3, LM75BIMM-3, LM75CIM-3, and LM75CIMM-3(1). TA = TJ = 25°C, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN(3) TYP(2) MAX(3) UNIT
VIN(1) Logical “1” Input Voltage –55°C ≤ TA ≤ 125°C +VS × 0.7 +VS + 0.3 V
VIN(0) Logical “0” Input Voltage –55°C ≤ TA ≤ 125°C −0.3 +VS × 0.3 V
IIN(1) Logical “1” Input Current VIN = +VS 0.005 μA
VIN = +VS, –55°C ≤ TA ≤ 125°C 1
IIN(0) Logical “0” Input Current VIN = 0 V −0.005 μA
VIN = 0 V, –55°C ≤ TA ≤ 125°C −1
CIN All Digital Inputs 5 pF
IOH High Level Output Current LM75B VOH = 5 V, –55°C ≤ TA ≤ 125°C 10 μA
LM75C VOH = 5 V, –55°C ≤ TA ≤ 125°C 100 μA
VOL Low Level Output Voltage IOL = 3 mA, –55°C ≤ TA ≤ 125°C 0.4 V
tOF Output Fall Time CL = 400 pF IO = 3 mA, –55°C ≤ TA ≤ 125°C 250 ns
(1) All part numbers of the LM75 will operate properly over the +VS supply voltage range of 3 V to 5.5 V. The devices are tested and specified for rated accuracy at their nominal supply voltage. Accuracy will typically degrade 1°C/V of variation in +VS as it varies from the nominal value.
(2) Typicals are at TA = 25°C and represent most likely parametric norm.
(3) Limits are specified to AOQL (Average Outgoing Quality Level).

6.7 I2C Digital Switching Characteristics

Unless otherwise noted, these specifications apply for VS = 5 Vdc for LM75BIM-5, LM75BIMM-5, LM75CIM-5, and LM75CIMM-5; and +VS = 3.3 Vdc for LM75BIM-3, LM75BIMM-3, LM75CIM-3, and LM75CIMM-3, CL (load capacitance) on output lines = 80 pF unless otherwise specified. TA = TJ = 25°C, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN(2)(3) TYP(1) MAX(2)(3) UNIT
t1 SCL (Clock) Period, See Figure 1 –55°C ≤ TA ≤ 125°C 2.5 µs
t2 Data in Set-Up Time to SCL High, See Figure 1 –55°C ≤ TA ≤ 125°C 100 ns
t3 Data Out Stable after SCL Low, See Figure 1 –55°C ≤ TA ≤ 125°C 0 ns
t4 SDA Low Set-Up Time to SCL Low (Start Condition), See Figure 1 –55°C ≤ TA ≤ 125°C 100 ns
t5 SDA High Hold Time after SCL High (Stop Condition), See Figure 1 –55°C ≤ TA ≤ 125°C 100 ns
tTIMEOUT SDA Time Low for Reset of Serial Interface(4) LM75B –55°C ≤ TA ≤ 125°C 75 325 ms
LM75C Not Applicable
(1) Typicals are at TA = 25°C and represent most likely parametric norm.
(2) Limits are specified to AOQL (Average Outgoing Quality Level).
(3) Timing specifications are tested at the bus input logic levels (Vin(0)=0.3xVA for a falling edge and Vin(1)=0.7xVA for a rising edge) when the SCL and SDA edge rates are similar.
(4) Holding the SDA line low for a time greater than tTIMEOUT will cause the LM75B to reset SDA to the IDLE state of the serial bus communication (SDA set High).
LM75B LM75C 30099804.png Figure 1. Timing Diagram
LM75B LM75C 30099805.png Figure 2. Temperature-to-Digital Transfer Function (Non-Linear Scale for Clarity)
LM75B LM75C 30099806.gif
LM75C θJA (thermal resistance, junction-to-ambient) when attached to a printed circuit board with 2 oz. foil similar to the one shown. Summarized below:
Device Number Package Number Thermal Resistance (θJA)
LM75BIM-3, LM75BIM-5, LM75CIM-3, LM75CIM-5 D (R-PDSO-G8) 200°C/W
LM75BIMM-3, LM75BIMM-5, LM75CIMM-3, LM75CIMM-5 DGK (S-PDSO-G8) 250°C/W
Figure 3. Printed Circuit Board Used for Thermal Resistance Specifications
LM75B LM75C 30099810.png Figure 4. I2C Timing Diagrams
LM75B LM75C 30099811.png Figure 5. I2C Timing Diagrams (Continued)

6.8 Typical Characteristics

LM75B LM75C 30099816.png Figure 6. Static Quiescent Current vs Temperature (LM75C)
LM75B LM75C 30099818.png Figure 8. Accuracy vs Temperature (LM75C)
LM75B LM75C 30099817.png Figure 7. Dynamic Quiescent Current vs Temperature (LM75C)