SNIS189D June   2015  – June 2018 LMT01

PRODUCTION DATA.  

  1. Features
  2. Applications
    1.     LMT01 Accuracy
  3. Description
    1.     2-Pin IC Temperature Sensor
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Electrical Characteristics - TO-92/LPG Pulse Count to Temperature LUT
    7. 6.7  Electrical Characteristics - WSON/DQX Pulse Count to Temperature LUT
    8. 6.8  Switching Characteristics
    9. 6.9  Timing Diagram
    10. 6.10 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Interface
      2. 7.3.2 Output Transfer Function
      3. 7.3.3 Current Output Conversion to Voltage
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Mounting, Temperature Conductivity, and Self-Heating
    2. 8.2 Typical Application
      1. 8.2.1 3.3-V System VDD MSP430 Interface - Using Comparator Input
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Setting the MSP430 Threshold and Hysteresis
        3. 8.2.1.3 Application Curves
    3. 8.3 System Examples
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

First, select the R and determine the maximum logic low voltage and the minimum logic high voltage while ensuring that when the LMT01 is converting, the minimum (VP – VN) requirement of 2.15 V is met.

  1. Select R using minimum VP-VN during data transmission (2 V) and maximum output current of the LMT01 (143.75 µA)
    • R = (3.0 V – 2 V) / 143.75 µA = 6.993 k the closest 1% resistor is 6.980 k
    • 6.993 k is the maximum resistance so if using 1% tolerance resistor the actual resistor value needs to be 1% less than 6.993 k and 6.98 k is 0.2% less than 6.993 k thus 6.81 k must be used.
  2. Check to see if the 2.15-V minimum voltage during conversion requirement for the LMT01 is met with the maximum IOL of 39 µA and maximum R of 6.81 k + 1%:
    • VLMT01 = 3 V – (6.81 k × 1.01) × 39 µA = 2.73 V
  3. Find the maximum low level voltage range using the maximum R of 6.81 k and maximum IOL of 39 µA:
    • VRLmax = (6.81 k × 1.01) × 39 µA = 268 mV
  4. Find the minimum high level voltage using the minimum R of 6.81 k and minimum IOH of 112.5 µA:
    • VRHmin = (6.81 k × 0.99) × 112.5 µA = 758 mV

Now select the MSP430 comparator threshold voltage that enables the LMT01 to communicate to the MSP430 properly.

  1. The MSP430 voltage is selected by selecting the internal VREF and then choosing the appropriate 1 of n/32 settings for n of 1 to 31.
    • VMID= (VRLmax – VRHmin) / 2 + VRHmin = (758 mV – 268 mV) / 2 + 268 mV = 513 mV
    • n = (VMID / VREF ) × 32 = (0.513 / 2.5) × 32 = 7
  2. To prevent oscillation of the comparator, output hysteresis must be implemented. The MSP430 allows this by enabling different n for the rising edge and falling edge of the comparator output. For a falling comparator output transition, N must be set to 6.
  3. Determine the noise margin caused by variation in comparator threshold level. Even though the comparator threshold level theoretically is set to VMID, the actual level varies from device to device due to VREF tolerance, resistor divider tolerance, and comparator offset. For proper operation, the COMP_B worst case input threshold levels must be within the minimum high and maximum low voltage levels presented across R, VRHmin and VRLmax, respectively
      Equation 5. LMT01 Equation_04_V_CH_MAX_SNIS189.gif

      where

      • VREF is the MSP430 COMP_B reference voltage for this example at 2.5 V
      • V_REF_TOL is the tolerance of the VREF of 1% or 0.01,
      • N is the divisor for the MSP430 or 7
      • N_TOL is the tolerance of the divisor or 0.5
      • COMP_OFFSET is the comparator offset specification or 10 mV
      Equation 6. LMT01 Equation_04_V_CL_MIN_SNIS189.gif

      where

      • VREF is the MSP430 COMP_B reference voltage for this example at 2.5 V,
      • V_REF_TOL is the tolerance of the VREF of 1% or 0.01,
      • N is the divisor for the MSP430 for the hysteresis setting or 6,
      • N_TOL is the tolerance of the divisor or 0.5,
      • COMP_OFFSET is the comparator offset specification or 10 mV

      The noise margin is the minimum of the two differences:

      Equation 7. (VRHmin – VCHmax) or (VCHmin – VRLmax)

      which works out to be 145 mV.

LMT01 Timing_06_NoiseMargin_SNIS189.gifFigure 29. Pulse Count Signal Amplitude Variation