SNOSC70C April   2012  – July 2016 LMV601 , LMV602 , LMV604

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - DC (2.7 V)
    6. 6.6 Electrical Characteristics - AC (2.7 V)
    7. 6.7 Electrical Characteristics - DC (5 V)
    8. 6.8 Electrical Characteristics - AC (5 V)
    9. 6.9 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Class AB Turnaround Stage Amplifier
    4. 7.4 Device Functional Modes
      1. 7.4.1 Low Input Bias Current
      2. 7.4.2 Shutdown Feature
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Dos and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guideline
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Community Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
Differential input voltage ±Supply Voltage
Supply voltage, (V+) – (V–) 6 V
Output short circuit to V+ See(3)
Output short circuit to V– See(4)
Junction temperature, TJ(5) 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
(3) Shorting output to V+ adversely affects reliability.
(4) Shorting output to V– adversely affects reliability.
(5) The maximum power dissipation is a function of TJ(MAX), RθJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA) / RθJA. All numbers apply for packages soldered directly onto a PCB.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM)(1)(1) ±2000 V
Machine model (MM)(2) ±200
(1) Human-Body Model, applicable std. MIL-STD-883, Method 3015.7.
(2) Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Supply voltage 2.7 5.5 V
Temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) LMV601 LMV602 LMV604 UNIT
DCK
(SC70)
D
(SOIC)
DGK
(VSSOP)
D
(SOIC)
PW
(TSSOP)
6 PINS 8 PINS 8 PINS 14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 229.1 120.8 178.3 91.5 123.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 116.1 65.2 68.4 49.7 50.5 °C/W
RθJB Junction-to-board thermal resistance 53.3 61.4 98.8 46 66.2 °C/W
ψJT Junction-to-top characterization parameter 8.8 16.1 9.8 12.4 6.3 °C/W
ψJB Junction-to-board characterization parameter 52.7 60.8 97.3 45.7 65.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics – DC (2.7 V)

Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 2.7 V, V = 0 V, VCM = V+ / 2, VO = V+ / 2 and RL > 1 MΩ.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOS Input offset voltage LMV601 0.25 4 mV
LMV602 and LMV604 0.55 5
TCVOS Input offset voltage average drift 1.7 µV/°C
IB Input bias current 0.02 pA
IOS Input offset current 6.6 fA
IS Supply current Per amplifier 100 170 µA
Shutdown mode, VSD = 0 V (LMV601) 45 pA 1 µA
CMRR Common-mode rejection ratio 0 V ≤ VCM ≤ 1.7 V 80 dB
PSRR Power supply rejection ratio 2.7 V ≤ V+ ≤ 5 V 82 dB
VCM Input common-mode voltage For CMRR ≥ 50 dB 0 1.7 V
AV Large signal voltage gain RL = 10 kΩ to 1.35 V 113 dB
VO Output swing RL = 10 kΩ to 1.35 V Swing high 5 30 mV
Swing low 30 5.3
IO Output short-circuit current Sourcing
LMV601 and LMV602
32 mA
Sourcing
LMV604
24
Sinking 24
ton Turnon time from shutdown (LMV601) 5 µs
VSD Shutdown pin voltage range ON mode (LMV601) 1.7 2.7 V
Shutdown mode (LMV601) 0 0.8
(1) Values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No assurance of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA.

6.6 Electrical Characteristics – AC (2.7 V)

Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 2.7 V, V = 0 V, VCM = V+ / 2, VO = V+ / 2 and RL > 1 MΩ.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SR Slew rate RL = 10 kΩ,(2) 1 V/µs
GBW Gain bandwidth product RL = 100 kΩ, CL = 200 pF 1 MHz
Φm Phase margin RL = 100 kΩ 72 deg
Gm Gain margin RL = 100 kΩ 20 dB
en Input-referred voltage noise f = 1 kHz 40 nV/√Hz
in Input-referred current noise f = 1 kHz 0.001 pA/√Hz
THD Total harmonic distortion f = 1 kHz, AV = 1
RL = 600 Ω, VIN = 1 VPP
0.017%
(1) Values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No assurance of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA.
(2) Connected as voltage follower with 2-VPP step input. Number specified is the slower of the positive and negative slew rates.

6.7 Electrical Characteristics – DC (5 V)

over operating free-air temperature range (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOS Input offset voltage LMV601 0.25 4 mV
LMV602 and LMV604 0.7 5
TCVOS Input offset voltage average drift 1.9 µV/°C
IB Input bias current 0.02 pA
IOS Input offset current 6.6 fA
IS Supply current Per amplifier 107 200 µA
Shutdown mode, VSD = 0 V (LMV601) 0.033 1 µA
CMRR Common-mode rejection ratio 0 V ≤ VCM ≤ 4 V 86 dB
PSRR Power supply rejection ratio 2.7 V ≤ V+ ≤ 5 V 82 dB
VCM Input common-mode voltage For CMRR ≥ 50 dB 0 4 V
AV Large signal voltage gain(2) RL = 10 kΩ to 2.5 V 116 dB
VO Output swing RL = 10 kΩ to 2.5 V Swing high 7 30 mV
Swing low 30 7
IO Output short-circuit current Sourcing 113 mA
Sinking 75
ton Turnon time from shutdown (LMV601) 5 µs
VSD Shutdown pin voltage range ON mode (LMV601) 3.1 5 V
Shutdown mode (LMV601) 0 0.8
(1) Values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No assurance of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA.
(2) RL is connected to mid-supply. The output voltage is GND + 0.2 V ≤ VO ≤ V+ − 0.2 V

6.8 Electrical Characteristics – AC (5 V)

Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 5 V, V = 0 V, VCM = V+ / 2, VO = V+ / 2 and RL > 1 MΩ.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SR Slew rate RL = 10 kΩ,(1) 1 V/µs
GBW Gain bandwidth product RL = 100 kΩ, CL = 200 pF 1 MHz
Φm Phase margin RL = 100 kΩ 72 °
Gm Gain margin RL = 100 kΩ 20 dB
en Input-referred voltage noise f = 1 kHz 39 nV/√Hz
in Input-referred current noise f = 1 kHz 0.001 pA/√Hz
THD Total harmonic distortion f = 1 kHz, AV = 1
RL = 600 Ω, VIN = 1 VPP
0.012%
(1) Connected as voltage follower with 2-VPP step input. Number specified is the slower of the positive and negative slew rates.

6.9 Typical Characteristics

LMV601 LMV602 LMV604 30185528.gif Figure 1. Supply Current vs Supply Voltage (LMV601)
LMV601 LMV602 LMV604 30185526.gif Figure 3. Output Voltage Swing vs Supply Voltage
LMV601 LMV602 LMV604 30185529.gif Figure 5. ISOURCE vs VOUT
LMV601 LMV602 LMV604 30185531.gif Figure 7. ISINK vs VOUT
LMV601 LMV602 LMV604 30185533.gif Figure 9. VOS vs VCM
LMV601 LMV602 LMV604 30185535.gif Figure 11. VIN vs VOUT
LMV601 LMV602 LMV604 30185503.gif Figure 13. CMRR vs Frequency
LMV601 LMV602 LMV604 30185504.gif Figure 15. Input Voltage Noise vs Frequency
LMV601 LMV602 LMV604 30185522.gif Figure 17. Slew Rate vs Temperature
LMV601 LMV602 LMV604 30185525.gif Figure 19. THD+N vs Frequency
LMV601 LMV602 LMV604 30185521.gif Figure 21. Open-Loop Frequency Over Temperature
LMV601 LMV602 LMV604 30185519.gif Figure 23. Open-Loop Frequency Response
LMV601 LMV602 LMV604 30185518.gif Figure 25. Gain and Phase vs CL
LMV601 LMV602 LMV604 30185549.gif Figure 27. Stability vs Capacitive Load
LMV601 LMV602 LMV604 30185508.gif Figure 29. Noninverting Large Signal Pulse Response
LMV601 LMV602 LMV604 30185509.gif Figure 31. Noninverting Large Signal Pulse Response
LMV601 LMV602 LMV604 30185510.gif Figure 33. Noninverting Large Signal Pulse Response
LMV601 LMV602 LMV604 30185514.gif Figure 35. Inverting Large Signal Pulse Response
LMV601 LMV602 LMV604 30185515.gif Figure 37. Inverting Large Signal Pulse Response
LMV601 LMV602 LMV604 30185516.gif Figure 39. Inverting Large Signal Pulse Response
LMV601 LMV602 LMV604 30185546.gif Figure 2. Input Current vs Temperature
LMV601 LMV602 LMV604 30185527.gif Figure 4. Output Voltage Swing vs Supply Voltage
LMV601 LMV602 LMV604 30185530.gif Figure 6. ISOURCE vs VOUT
LMV601 LMV602 LMV604 30185532.gif Figure 8. ISINK vs VOUT
LMV601 LMV602 LMV604 30185534.gif Figure 10. VOS vs VCM
LMV601 LMV602 LMV604 30185536.gif Figure 12. VIN vs VOUT
LMV601 LMV602 LMV604 30185501.gif Figure 14. PSRR vs Frequency
LMV601 LMV602 LMV604 30185502.gif Figure 16. Slew Rate vs VSUPPLY
LMV601 LMV602 LMV604 30185523.gif Figure 18. Slew Rate vs Temperature
LMV601 LMV602 LMV604 30185524.gif Figure 20. THD+N vs VOUT
LMV601 LMV602 LMV604 30185520.gif Figure 22. Open-Loop Frequency Response
LMV601 LMV602 LMV604 30185517.gif Figure 24. Gain and Phase vs CL
LMV601 LMV602 LMV604 30185548.gif Figure 26. Stability vs Capacitive Load
LMV601 LMV602 LMV604 30185505.gif Figure 28. Noninverting Small Signal Pulse Response
LMV601 LMV602 LMV604 30185506.gif Figure 30. Noninverting Small Signal Pulse Response
LMV601 LMV602 LMV604 30185507.gif Figure 32. Noninverting Small Signal Pulse Response
LMV601 LMV602 LMV604 30185511.gif Figure 34. Inverting Small Signal Pulse Response
LMV601 LMV602 LMV604 30185512.gif Figure 36. Inverting Small Signal Pulse Response
LMV601 LMV602 LMV604 30185513.gif Figure 38. Inverting Small Signal Pulse Response
LMV601 LMV602 LMV604 30185554.gif Figure 40. Crosstalk Rejection vs Frequency