SNAS711A October   2016  – January 2017 LMX2491

PRODUCTION DATA.  

  1. 1 Features
  2. 2  Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Storage Conditions
    3. 6.3 ESD Ratings
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Timing Requirements, Programming Interface (CLK, DATA, LE)
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  OSCin Input
      2. 7.3.2  OSCin Doubler
      3. 7.3.3  R Divider
      4. 7.3.4  PLL N Divider
      5. 7.3.5  Fractional Circuitry
      6. 7.3.6  PLL Phase Detector and Charge Pump
      7. 7.3.7  External Loop Filter
      8. 7.3.8  Fastlock and Cycle Slip Reduction
      9. 7.3.9  Lock Detect and Charge Pump Voltage Monitor
        1. 7.3.9.1 Charge Pump Voltage Monitor
        2. 7.3.9.2 Digital Lock Detect
      10. 7.3.10 FSK/PSK Modulation
      11. 7.3.11 Ramping Functions
        1. 7.3.11.1 Ramp Count
        2. 7.3.11.2 Ramp Comparators and Ramp Limits
      12. 7.3.12 Power-on-reset (POR)
      13. 7.3.13 Register Readback
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous Frequency Generator
        1. 7.4.1.1 Integer Mode Operation
        2. 7.4.1.2 Fractional Mode Operation
      2. 7.4.2 Modulated Waveform Generator
    5. 7.5 Programming
      1. 7.5.1 Loading Registers
    6. 7.6 Register Maps
      1. 7.6.1 Register Field Descriptions
        1. 7.6.1.1 POWERDOWN and Reset Fields
        2. 7.6.1.2 Dividers and Fractional Controls
          1. 7.6.1.2.1 Speed Up Controls (Cycle Slip Reduction and Fastlock)
      2. 7.6.2 Lock Detect and Charge Pump Monitoring
      3. 7.6.3 TRIG1, TRIG2, MOD, and MUXout Pins
      4. 7.6.4 Ramping Functions
      5. 7.6.5 Individual Ramp Controls
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1  Design Requirements
      2. 8.2.2  Detailed Design Procedure
      3. 8.2.3  TICS Pro Basic Setup
      4. 8.2.4  Frequency Shift Keying Example
      5. 8.2.5  Single Sawtooth Ramp Example
      6. 8.2.6  Continuous Sawtooth Ramp Example
      7. 8.2.7  Continuous Sawtooth Ramp with FSK Example
      8. 8.2.8  Continuous Triangular Ramp Example
      9. 8.2.9  Continuous Trapezoid Ramp Example
      10. 8.2.10 Arbitrary Waveform Ramp Example
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • –227-dBc/Hz Normalized PLL Noise
  • 500-MHz to 6.4-GHz Wideband PLL
  • 3.15-V to 5.25-V Charge Pump PLL Supply
  • Versatile Ramp / Chirp Generation
  • 200-MHz Maximum Phase Detector Frequency
  • FSK / PSK Modulation Pin
  • Digital Lock Detect
  • Single 3.3-V Supply Capability

2 Applications

  • FMCW Radars
  • Military Radars
  • Microwave Backhaul
  • Test and Measurement
  • Satellite Communications
  • Wireless Infrastructure
  • Sampling Clock for High-Speed ADC/DAC

3 Description

The LMX2491 device is a low-noise, 6.4-GHz wideband delta-sigma fractional N PLL with ramp and chirp generation. It consists of a phase frequency detector, programmable charge pump, and high frequency input for the external VCO. The LMX2491 supports a broad and flexible class of ramping capabilities, including FSK, PSK, and configurable piecewise linear FM modulation profiles of up to 8 segments. It supports fine PLL resolution and fast ramp with up to a 200-MHz phase detector rate. The LMX2491 allows any of its registers to be read back. The LMX2491 can operate with a single 3.3-V supply. Moreover, supporting up to 5.25-V charge pump can eliminate the need of external amplifier, leading to a simpler solution with improved phase noise performance.

Device Information

PART NUMBER PACKAGE BODY SIZE (NOM)
LMX2491 WQFN (24) 4.00 mm × 4.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

LMX2491 sch_main_snas711.gif