SNVS336F June   2006  – August 2015 LP38856

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable Operation
      2. 7.3.2 Input Voltage
      3. 7.3.3 Bias Voltage
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Supply Sequencing
      6. 7.3.6 Reverse Voltage
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with 3 V ≤ VBIAS ≤ 5.5 V , VOUT(TARGET) + 0.3 V ≤ VIN ≤ VBIAS
      2. 7.4.2 Operation with VEN Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
          1. 8.2.2.1.1 Output Capacitor
          2. 8.2.2.1.2 Input Capacitor
          3. 8.2.2.1.3 Bias Capacitor
        2. 8.2.2.2 Power Dissipation and Heatsinking
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Input Voltage: 1.1 V to 5.5 V
  • Wide VBIAS Supply Operating Range: 3 V to 5.5 V
  • Standard VOUT: 0.8 V and 1.2 V
  • Stable with 10-µF Ceramic Capacitors
  • Dropout Voltage of 240 mV (Typical) at 3-A Load Current
  • Precision Output Voltage Across All Line and Load Conditions:
    • ±1% for TJ = 25°C
    • ±2% for 0°C ≤ TJ ≤ +125°C
    • ±3% for –40°C ≤ TJ ≤ +125°C
  • Overtemperature and Overcurrent Protection
  • –40°C to +125°C Operating Temperature Range

2 Applications

  • ASIC Power Supplies In:
    • Desktops, Notebooks, and Graphics Cards, Servers
    • Gaming Set Top Boxes, Printers and Copiers
  • Server Core and I/O Supplies
  • DSP and FPGA Power Supplies
  • SMPS Post-Regulator

3 Description

The LP38856 is a high-current, fast-response regulator which can maintain output voltage regulation with an extremely low input-to-output voltage drop. Fabricated on a CMOS process, the device operates from two input voltages: VBIAS provides power for the internal bias and control circuits, as well as drive for the gate of the N-MOS power transistor, while VIN supplies power to the load. The use of an external bias rail allows the part to operate from ultra-low VIN voltages. Unlike bipolar regulators, the CMOS architecture consumes extremely low quiescent current at any output load current. The use of an N-MOS power transistor results in wide bandwidth, yet minimum external capacitance is required to maintain loop stability.

The fast transient response of this device makes it suitable for use in powering DSP, microcontroller core voltages, and switch mode power supply post regulators. The LP38856 is available in 5-pin TO-220 and DDPAK/TO-263 packages.

  • Dropout Voltage: 240 mV (typical) at 3-A load current.
  • Low Ground Pin Current: 10 mA (typical) at 3-A load current.
  • Shutdown Current: 1 µA (typical) IIN(GND) when EN pin is low.
  • Precision Output Voltage: ±1% for TJ = 25°C and ±2% for 0°C ≤ TJ ≤ +125°C, across all line and load conditions.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
LP38856 DDPAK/TO-263 (5) 10.16 mm × 8.42 mm
TO-220 (5) 14.986 mm × 10.16 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Circuit

LP38856 20131101.gif