SLASEK0A December 2017 – March 2018 MSP430FR5969-SP
NOTE:I(AM, cache hit ratio): Program resides in FRAM. Data resides in SRAM. Average current dissipation varies with cache hit-to-miss ratio as specified. Cache hit ratio represents number cache accesses divided by the total number of FRAM accesses. For example, a 75% ratio implies three of every four accesses is from cache, and the remaining are FRAM accesses.
NOTE:I(AM, RAMonly): Program and data reside entirely in RAM. All execution is from RAM. FRAM is off.