SLLSEK1B July   2014  – March 2018 ONET2804T

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Eye Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Bond Pad Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 DC Electrical Characteristics
    5. 6.5 AC Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Signal Path
      2. 7.3.2 Gain Adjustment
      3. 7.3.3 Amplitude Adjustment
      4. 7.3.4 Rate Select
      5. 7.3.5 Threshold Adjustment
      6. 7.3.6 Filter Circuitry
      7. 7.3.7 AGC and RSSI
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pad Control
      2. 7.4.2 2-Wire Interface Control
      3. 7.4.3 2-Wire Interface and Control Logic
      4. 7.4.4 Bus Idle
      5. 7.4.5 Start Data Transfer
      6. 7.4.6 Stop Data Transfer
      7. 7.4.7 Data Transfer
      8. 7.4.8 Acknowledge
    5. 7.5 Register Maps
      1. 7.5.1  Register 0 (0x00) – Control Settings (offset = 0h) [reset = 0h]
        1. Table 2. Register 0 (0x00) – Control Settings Field Descriptions
      2. 7.5.2  Register 1 (0x01) – Amplitude and Rate for Channel 1 (offset = 1h) [reset = 0h]
        1. Table 3. Register 1 (0x01) – Amplitude and Rate for Channel 1 Field Descriptions
      3. 7.5.3  Register 2 (0x02) Mapping – Threshold and Gain for Channel 1 (offset = 2h) [reset = 0h]
        1. Table 4. Register 2 (0x02) – Threshold and Gain for Channel 1
      4. 7.5.4  Register 3 (0x03) – Reserved
        1. Table 5. Register 3 (0x03) – Reserved Field Descriptions
      5. 7.5.5  Register 4 (0x04) – Reserved
        1. Table 6. Register 4 (0x04) – Reserved Field Descriptions
      6. 7.5.6  Register 5 (0x05) – Reserved
        1. Table 7. Register 5 (0x05) – Reserved Field Descriptions
      7. 7.5.7  Register 6 (0x06) – Reserved
        1. Table 8. Register 6 (0x06) – Reserved Field Descriptions
      8. 7.5.8  Register 7 (0x07) – Amplitude and Rate for Channel 2 (offset = 7h) [reset = 0h]
        1. Table 9. Register 7 (0x07) – Amplitude and Rate for Channel 2 Field Descriptions
      9. 7.5.9  Register 8 (0x08) Mapping – Threshold and Gain for Channel 1 (offset = 8h) [reset = 0h]
        1. Table 10. Register 8 (0x08) – Threshold and Gain for Channel 2
      10. 7.5.10 Register 9 (0x09) – Reserved
        1. Table 11. Register 9 (0x09) – Reserved Field Descriptions
      11. 7.5.11 Register 10 (0x0A) – Reserved
        1. Table 12. Register 10 (0x0A) – Reserved Field Descriptions
      12. 7.5.12 Register 11 (0x0B) – Reserved
        1. Table 13. Register 11 (0x0B) – Reserved Field Descriptions
      13. 7.5.13 Register 12 (0x0C) – Reserved
        1. Table 14. Register 12 (0x0C) – Reserved Field Descriptions
      14. 7.5.14 Register 13 (0x0D) – Amplitude and Rate for Channel 3 (offset = Dh) [reset = 0h]
        1. Table 15. Register 13 (0x0D) – Amplitude and Rate for Channel 3 Field Descriptions
      15. 7.5.15 Register 14 (0x0E) Mapping – Threshold and Gain for Channel 3 (offset = Eh) [reset = 0h]
        1. Table 16. Register 14 (0x0E) – Threshold and Gain for Channel 3
      16. 7.5.16 Register 15 (0x0F) – Reserved
        1. Table 17. Register 15 (0x0F) – Reserved Field Descriptions
      17. 7.5.17 Register 16 (0x10) – Reserved
        1. Table 18. Register 16 (0x10) – Reserved Field Descriptions
      18. 7.5.18 Register 17 (0x11) – Reserved
        1. Table 19. Register 17 (0x11) – Reserved Field Descriptions
      19. 7.5.19 Register 18 (0x12) – Reserved
        1. Table 20. Register 18 (0x12) – Reserved Field Descriptions
      20. 7.5.20 Register 19 (0x13) – Amplitude and Rate for Channel 4 (offset = 13h ) [reset = 0h]
        1. Table 21. Register 19 (0x13) – Amplitude and Rate for Channel 4 Field Descriptions
      21. 7.5.21 Register 20 (0x14) Mapping – Threshold and Gain for Channel 4 (offset =14h) [reset = 0h]
        1. Table 22. Register 20 (0x14) – Threshold and Gain for Channel 4
      22. 7.5.22 Register 21 (0x15) – Reserved
        1. Table 23. Register 21 (0x15) – Reserved Field Descriptions
      23. 7.5.23 Register 22 (0x10) – Reserved
        1. Table 24. Register 21 (0x10) – Reserved Field Descriptions
      24. 7.5.24 Register 23 (0x17) – Reserved
        1. Table 25. Register 23 (0x17) – Reserved Field Descriptions
      25. 7.5.25 Register 24 (0x18) – Reserved
        1. Table 26. Register 24 (0x18) – Reserved Field Descriptions
      26. 7.5.26 Register 25 (0x19) – Reserved
        1. Table 27. Register 25 (0x19) – Reserved Field Descriptions
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application, Pad Control
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Application, 2-Wire Control
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • Y|0
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2 Layout Example

The IC dimensions are shown in Figure 46, and the pad locations are provided in Table 29. The device is designed for wire bonding not flip chip.

ONET2804T Padout_with_Dimensions_SLLSEK1.gifFigure 46. Chip Dimensions and Pad Locations

Die Thickness: 203 ± 13 μm
Pad Dimensions: 105 μm x 65 μm
Die Size: 3250 μm ±40µm x 1450 μm ±40µm

Table 29. Bond Pad Co-ordinates

PAD COORDINATES
(Referenced to Pad 1)		 SYMBOL TYPE DESCRIPTION
x (µm) y (µm)
1 0 0 VCCO1 Supply 3.3V supply voltage
2 0 –94 VCCO2 Supply 3.3V supply voltage
3 0 –188 VCCI2 Supply 3.3V supply voltage
4 0 –282 VCCI1 Supply 3.3V supply voltage
5 0 –376 I2CENA Digital input I2C Enable
6 0 –470 AMPL Digital input Amplitude control
7 0 –580 RATE Digital input Rate selection
8 0 –704 GAIN Digital input Gain control
9 0 –814 RSSI1 Analog output Receive signal strength indicator for channel 1
10 0 –908 RSSI2 Analog output Receive signal strength indicator for channel 2
11 180 –1110 GND Supply Circuit ground
12 290 –1110 FILTER1 Analog output Bias voltage for photodiode 1
13 400 –1110 IN1 Analog input TIA input for channel 1
14 510 –1110 FILTER1 Analog output Bias voltage for photodiode 1
15 620 –1110 GND Supply Circuit ground
16 720 –1110 NC No connect Do not connect
17 829 –1110 NC No connect Do not connect
18 929 –1110 GND Supply Circuit ground
19 1039 –1110 FILTER2 Analog output Bias voltage for photodiode 2
20 1149 –1110 IN2 Analog input TIA input for channel 2
21 1259 –1110 FILTER2 Analog output Bias voltage for photodiode 2
22 1369 –1110 GND Supply Circuit ground
23 1469 –1110 NC No connect Do not connect
24 1580 –1110 NC No connect Do not connect
25 1680 –1110 GND Supply Circuit ground
26 1790 –1110 FILTER3 Analog output Bias voltage for photodiode 3
27 1900 –1110 IN3 Analog input TIA input for channel 3
28 2010 –1110 FILTER3 Analog output Bias voltage for photodiode 3
29 2120 –1110 GND Supply Circuit ground
30 2239 –1110 NC No connect Do not connect
31 2329 –1110 NC No connect Do not connect
32 2429 –1110 GND Supply Circuit ground
33 2539 –1110 FILTER4 Analog output Bias voltage for photodiode 4
34 2649 –1110 IN4 Analog input TIA input for channel 4
35 2759 –1110 FILTER4 Analog output Bias voltage for photodiode 4
36 2869 –1110 GND Supply Circuit ground
37 3051 –908 RSSI3 Analog output Receive signal strength indicator for channel 3
38 3051 –814 RSSI4 Analog output Receive signal strength indicator for channel 4
39 3051 –704 SDA Digital in/out 2-wire data
40 3051 –579 SCL Digital input 2-wire clock
41 3051 –470 TRSH Digital input Input threshold control (cross-point)
42 3051 –376 NC No connect Do not connect
43 3051 –282 VCCI4 Supply 3.3V supply voltage
44 3051 –188 VCCI3 Supply 3.3V supply voltage
45 3051 –94 VCCO3 Supply 3.3V supply voltage
46 3051 0 VCCO4 Supply 3.3V supply voltage
47 2888 140 GND Supply Circuit ground
48 2799 140 GND Supply Circuit ground
49 2699 140 OUT4– Analog output Inverted data output for channel 4
50 2599 140 OUT4+ Analog output Non-inverted data output for channel 4
51 2499 140 GND Supply Circuit ground
52 2410 140 GND Supply Circuit ground
53 2322 140 ADR1 Digital input 2-wire address bit 1 control
54 2228 140 ADR0 Digital input 2-wire address bit 0 control
55 2139 140 GND Supply Circuit ground
56 2050 140 GND Supply Circuit ground
57 1950 140 OUT3- Analog output Inverted data output for channel 3
58 1850 140 OUT3+ Analog output Non-inverted data output for channel 3
59 1750 140 GND Supply Circuit ground
60 1661 140 GND Supply Circuit ground
61 1572 140 NC No connect Do not connect
62 1477 140 NC No connect Do not connect
63 1388 140 GND Supply Circuit ground
64 1299 140 GND Supply Circuit ground
65 1199 140 OUT2– Analog output Inverted data output for channel 2
66 1099 140 OUT2+ Analog output Non-inverted data output for channel 2
67 999 140 GND Supply Circuit ground
68 910 140 GND Supply Circuit ground
69 821 140 NC No connect Do not connect
70 728 140 NRESET Digital input 2-wire negative reset
71 639 140 GND Supply Circuit ground
72 550 140 GND Supply Circuit ground
73 450 140 OUT1– Analog output Inverted data output for channel 1
74 350 140 OUT1+ Analog output Non-inverted data output for channel 1
75 250 140 GND Supply Circuit ground
76 161 140 GND Supply Circuit ground