SLLSEK1B July 2014 – March 2018 ONET2804T
|6||AMPL||Digital input||3-state input for amplitude control of all 4 channels.
VCC: 500 mVpp differential output swing
Open: 300 mVpp differential output swing (default)
GND: 250 mVpp differential output swing.
|53||ADR1||Digital input||2-wire interface address programming pin. Leave this pad open for a default address of 0001100. Grounding this pad changes the 2nd address bit to a 1 (0001110).|
|54||ADR0||Digital input||2-wire interface address programming pin. Leave this pad open for a default address of 0001100. Grounding this pad changes the 1st address bit to a 1 (0001101).|
|12, 14, 19, 21, 26, 28, 33, 35||FILTERx||Analog output||Bias voltage for photodiode cathode. These pads are biased to VCC - 100 mV.|
|8||GAIN||Digital input||3-state input for gain control of all 4 channels.
VCC: Minimum transimpedance
Open: Default transimpedance
GND: Medium transimpedance
|11, 15, 18, 22, 25, 29, 32, 36, 47, 48, 51, 52, 55, 56, 59, 60, 63, 64, 67, 68, 71, 72, 75, 76||GND||Supply||Circuit ground. All GND pads are connected on die. Bonding all pads is recommended, except for 11, 15, 18, 22, 25,29,32, and 36.|
|5||I2CENA||Digital input||2-wire control option. Leave the pad unconnected for pad control of the IC. Two-wire control can be enabled by applying a high signal to the pad.|
|13, 20, 27, 34||INx||Analog input||Data input to TIAx (connect to photodiode anode).|
|16, 17, 23, 24, 30, 31, 42, 61, 62, 69||NC||No Connect||Do not connect|
|70||NRESET||Digital input||Used to reset the 2-wire state machine and registers. Leave open for normal operation and set low to reset the 2-wire interface.|
|49, 57, 65, 73||OUTx–||Analog output||Inverted CML data output for channel x. On-chip 50 Ω back-terminated to VCC.|
|50, 58, 66, 74||OUTx+||Analog output||Non-inverted CML data output for channel x. On-chip 50 Ω back-terminated to VCC.|
|7||RATE||Digital input||3-state input for bandwidth control of all 4 channels.
VCC: Increase the bandwidth
Open: 21 GHz bandwidth (default)
GND: reduce the bandwidth
|9, 10, 37, 38||RSSIx||Analog output||Indicates the strength of the received signal (RSSI) for channel x if the photo diode is biased from FILTERx. The analog output current is proportional to the input data amplitude. Connect to an external resistor to ground (GND). For proper operation, ensure that the voltage at the RSSI pad does not exceed VCC - 0.65 V. If the RSSI feature is not used these pads should be left open.|
|40||SCL||Digital input||2-wire interface serial clock input. Includes a 10 kΩ pull-up resistor to VCC.|
|39||SDA||Digital –in/out||2-wire interface serial data input. Includes a 10 kΩ pull-up resistor to VCC.|
|41||TRSH||Digital input||3-state input for threshold control.
VCC: Crossing point shifted down
Open: No threshold adjustment (default)
GND: Crossing point shifted up
|1, 2, 45, 46||VCCOx||Supply||2.97 V – 3.47 V supply voltage for AGCx and CMLx amplifiers.|
|3, 4, 43, 44||VCCIx||Supply||2.97 V – 3.47 V supply voltage for input TIAx stage.|