SBOS516G September   2010  – May 2020 OPA171 , OPA2171 , OPA4171

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Offset Voltage vs Common-Mode Voltage
      2.      Offset Voltage vs Power Supply
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions: OPA171
    2.     Pin Functions: OPA2171
    3.     Pin Functions: OPA4171
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA171
    5. 6.5 Thermal Information: OPA2171
    6. 6.6 Thermal Information: OPA4171
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Characteristics
      2. 7.3.2 Common-Mode Voltage Range
      3. 7.3.3 Phase-Reversal Protection
      4. 7.3.4 Capacitive Load and Stability
    4. 7.4 Device Functional Modes
      1. 7.4.1 Common-Mode Voltage Range
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Electrical Overstress
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Capacitive Load and Stability
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

Figure 42 shows a unity-gain buffer driving a capacitive load. Equation 1 shows the transfer function for the circuit in Figure 42. Not shown in Figure 42 is the open-loop output resistance of the operational amplifier, Ro.

Equation 1. OPA171 OPA2171 OPA4171 ai_refdes_eqn_bos618.gif

The transfer function in Equation 1 contains a pole and a zero. The frequency of the pole (fp) is determined by (Ro + RISO) and CLOAD. Components RISO and CLOAD determine the frequency of the zero (fz). Select RISO such that the rate of closure (ROC) between the open-loop gain (AOL) and 1/β is 20 dB/decade to obtain a stable system. Figure 42 shows the concept. The 1/β curve for a unity-gain buffer is 0 dB.

OPA171 OPA2171 OPA4171 ai_refdes_bodeplot_bos618.gifFigure 42. Unity-Gain Amplifier With RISO Compensation

ROC stability analysis is typically simulated. The validity of the analysis depends on multiple factors, especially the accurate modeling of Ro. In addition to simulating the ROC, a robust stability analysis includes a measurement of overshoot percentage and AC gain peaking of the circuit using a function generator, oscilloscope, and gain and phase analyzer. Phase margin is then calculated from these measurements. Table 3 shows the overshoot percentage and AC gain peaking that correspond to phase margins of 45° and 60°. For more details on this design and other alternative devices that can be used in place of the OPAx171, see Capacitive Load Drive Solution using an Isolation Resistor.

Table 3. Phase Margin versus Overshoot and AC Gain Peaking

PHASE MARGIN OVERSHOOT AC GAIN PEAKING
45° 23.3% 2.35 dB
60° 8.8% 0.28 dB