SCPS121H January   2005  – February 2020 PCF8575

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
      1. 8.2.1 Logic Diagram (Positive Logic)
      2. 8.2.2 Simplified Schematic Diagram of Each P-Port Input/Output
    3. 8.3 Feature Description
      1. 8.3.1 I2C Interface
      2. 8.3.2 Interface Definition
      3. 8.3.3 Address Reference
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Minimizing ICC When I/Os Control LEDs
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset
    2. 10.2 System Impact
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
    2. 12.2 Documentation Support
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DB, DBQ, DGV, DW, or PW Package
SSOP, TVSOP, SOIC, TSSOP
(Top View)
RGE Package
VQFN
(Top View)

Pin Functions

PIN TYPE DESCRIPTION
NAME DB, DBQ, DGV,
DW, AND PW		 RGE
A0 21 18 I Address input 0. Connect directly to VCC or ground. Pull-up resistors are not needed.
A1 2 23 I Address input 1. Connect directly to VCC or ground. Pull-up resistors are not needed.
A2 3 24 I Address input 2. Connect directly to VCC or ground. Pull-up resistors are not needed.
INT 1 22 O Interrupt output. Connect to VCC through a pull-up resistor.
P00 4 1 I/O P-port input/output. Push-pull design structure.
P01 5 2 I/O P-port input/output. Push-pull design structure.
P02 6 3 I/O P-port input/output. Push-pull design structure.
P03 7 4 I/O P-port input/output. Push-pull design structure.
P04 8 5 I/O P-port input/output. Push-pull design structure.
P05 9 6 I/O P-port input/output. Push-pull design structure.
P06 10 7 I/O P-port input/output. Push-pull design structure.
P07 11 8 I/O P-port input/output. Push-pull design structure.
GND 12 9 — Ground
P10 13 10 I/O P-port input/output. Push-pull design structure.
P11 14 11 I/O P-port input/output. Push-pull design structure.
P12 15 12 I/O P-port input/output. Push-pull design structure.
P13 16 13 I/O P-port input/output. Push-pull design structure.
P14 17 14 I/O P-port input/output. Push-pull design structure.
P15 18 15 I/O P-port input/output. Push-pull design structure.
P16 19 16 I/O P-port input/output. Push-pull design structure.
P17 20 17 I/O P-port input/output. Push-pull design structure.
SCL 22 19 I Serial clock line. Connect to VCC through a pull-up resistor
SDA 23 20 I/O Serial data line. Connect to VCC through a pull-up resistor.
VCC 24 21 — Supply voltage