SCES598E JULY 2004 – March 2016 SN74AVCH1T45
PRODUCTION DATA.
The SN74AVCH1T45 is a single-bit, dual-supply, noninverting voltage level translator. Pins A and DIR are referenced to VCCA, while pin B is referenced to VCCB. Both the A port and B port can accept I/O voltages ranging from 1.2 V to 3.6 V. The high on DIR allows data transmission from Port A to Port B and a low on DIR allows data transmission from Port B to Port A. See applications report, AVC Logic Family Technology and Applications (SCLA015), for more information.
Both VCCA and VCCB can be supplied at any voltage from 1.2 V to 3.6 V, making the device suitable for translating between any of the voltage nodes (1.2 V, 1.8 V, 2.5 V and 3.3 V).
SN74AVCH1T45 can support high data rate applications, which can be calculated from the maximum propagation delay. This is also dependent on output load. For example, a 1.8-V to 3.3-V conversion yields a maximum data rate of 500 Mbps.
Ioff circuitry disables the outputs, preventing damaging current backflow through the SN74AVCH1T45 when it is powered down. This can occur in applications where subsections of a system are powered down (partial-power-down) to reduce power consumption.
Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state, which helps with board space savings and reduced component costs. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. See applications report, Bus-Hold Circuit (SCLA015), for more information.
The VCC isolation feature ensures that if either VCCA or VCCB are at GND (or < 0.4 V), both ports will be in a high-impedance state (IOZ as shown in Electrical Characteristics). This prevents false logic levels from being presented to either bus.
Table 1 lists the functional modes of the SN74AVCH1T45.
DIR | OPERATION |
---|---|
L | B data to A bus |
H | A data to B bus |