SCES874 March 2017 SN74LVC1G79-Q1
This automotive AEC-Q100 qualified single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
|PART NUMBER||PACKAGE||BODY SIZE|
|SN74LVC1G79QDCKRQ1||SC70 (5)||2.00 mm × 1.25 mm|