SCES324Q July   2001  – January 2019 SN74LVC2G53

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Logic Diagram
      2.      Logic Diagram, Each Switch (SW)
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Analog Switch Characteristics
    8. 6.8 Operating Characteristics
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCU|8
  • YZP|8
  • DCT|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC MIN TYP(1) MAX UNIT
ron ON-state switch resistance VI = VCC or GND,
VINH = VIL
(see Figure 2
and Figure 1)
IS = 4 mA 1.65 V 13 30
IS = 8 mA 2.3 V 10 20
IS = 24 mA 3 V 8.5 17
IS = 32 mA 4.5 V 6.5 13
ron(p) Peak ON-state resistance VI = VCC to GND,
VINH = VIL
(see Figure 2
and Figure 1)
IS = 4 mA 1.65 V 86.5 120
IS = 8 mA 2.3 V 23 30
IS = 24 mA 3 V 13 20
IS = 32 mA 4.5 V 8 15
Δron Difference of ON-state resistance
between switches
VI = VCC to GND,
VC = VIH
(see Figure 2
and Figure 1)
IS = 4 mA 1.65 V 7
IS = 8 mA 2.3 V 5
IS = 24 mA 3 V 3
IS = 32 mA 4.5 V 2
IS(off) OFF-state switch leakage current VI = VCC and VO = GND or
VI = GND and VO = VCC,
VINH = VIH (see Figure 3)
5.5 V ±1 μA
±0.1(1)
IS(on) ON-state switch leakage current VI = VCC or GND, VINH = VIL,
VO = Open (see Figure 4)
5.5 V ±1 μA
±0.1(1)
II Control input current VC = VCC or GND 5.5 V ±1 μA
±0.1(1)
ICC Supply current VC = VCC or GND 5.5 V 1 μA
ΔICC Supply-current change VC = VCC – 0.6 V 5.5 V 500 μA
Cic Control input capacitance 5 V 3.5 pF
Cio(off) Switch input/output
capacitance
 Y 5 V 6.5 pF
 COM 10
Cio(on) Switch input/output capacitance 5 V 19.5 pF
TA = 25°C