SLOS318I May 2000 – August 2015 THS4130 , THS4131

PRODUCTION DATA.

- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Device Comparison Tables
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Resistor matching is important in fully-differential amplifiers. The balance of the output on the reference voltage depends on matched ratios of the resistor. CMRR, PSRR, and cancellation of the second-harmonic distortion diminish if resistor mismatch occurs. Therefore, it is recommended to use 1% tolerance resistors or better to keep the performance optimized.

V_{OCM} sets the dc level of the output signals. If no voltage is applied to the V_{OCM}pin, it is set to the midrail voltage internally defined as:

Equation 8.

In the differential mode, the V_{OCM} on the two outputs cancel each other. Therefore, the output in the differential mode is the same as the input in the gain of 1. V_{OCM }has a high bandwidth capability up to the typical operation range of the amplifier. For the prevention of noise going through the device, use a 0.1 µF capacitor on the V_{OCM} pin as a bypass capacitor. The*Functional Block Diagram* shows the simplified diagram of the THS413x.

Driving capacitive loads with high-performance amplifiers is not a problem as long as certain precautions are taken. The first is to realize that the THS413x has been internally compensated to maximize its bandwidth and slew rate performance. When the amplifier is compensated in this manner, capacitive loading directly on the output decreases the device phase margin leading to high-frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series with the output of the amplifier, as shown in Figure 37. A minimum value of 20 Ω should work well for most applications. For example, in 50-Ω transmission systems, setting the series resistor value to 50 Ω both isolates any capacitance loading and provides the proper line impedance matching at the source end.

Data converters are one of the most popular applications for the fully-differential amplifiers. Figure 38 shows a typical configuration of a fully-differential amplifier attached to a differential analog-to-digital converter (ADC).

Fully-differential amplifiers can operate with a single supply. V_{OCM }defaults to the midrail voltage, V_{CC}/2. The differential output may be fed into a data converter. This method eliminates the use of a transformer in the circuit. If the ADC has a reference voltage output (V_{ref}), then it is recommended to connect it directly to the V_{OCM }of the amplifier using a bypass capacitor for stability. For proper operation, the input common-mode voltage to the input terminal of the amplifier should not exceed the common-mode input voltage range.

Some single-supply applications may require the input voltage to exceed the common-mode input voltage range. In such cases, the circuit configuration of Figure 40 is suggested to bring the common-mode input voltage within the specifications of the amplifier.

Equation 9 is used to calculate R_{PU}:

Equation 9.

For signal conditioning in ADC applications, it is important to limit the input frequency to the ADC. Low-pass filters can prevent the aliasing of the high-frequency noise with the frequency of operation. Figure 41 presents a method by which the noise may be filtered in the THS413x.

Figure 41 shows a typical application design example for the THS413x device in active low-pass filter topology driving and ADC.

Table 3 shows example design parameters and values for the typical application design example in Figure 41.

DESIGN PARAMETERS | VALUE |
---|---|

Supply voltage | ±2.5 V to ±15 V |

Amplifier topology | Voltage feedback |

Output control | DC coupled with output common mode control capability |

Filter requirement | 500 kHz, Multiple feedback low pass filter |

Figure 41 shows a multiple-feedback (MFB) lowpass filter. The transfer function for this filter circuit is:

Equation 10.

Equation 11.

K sets the pass band gain, fc is the cutoff frequency for the filter, FSF is a frequency scaling factor, and Q is the quality factor.

Equation 12.

where Re is the real part, and Im is the imaginary part of the complex pole pair. Setting R2 = R, R3 = mR, C1 = C, and C2 = nC results in:

Equation 13.

Start by determining the ratios, m and n, required for the gain and Q of the filter type being designed, then select C and calculate R for the desired fc.