SBOS758D May   2016  – November 2019 THS6212

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Line-Driver Circuit Using the THS6212
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
    2.     Bond Pad Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: VS = ±12 V
    6. 6.6  Electrical Characteristics: VS = ±6 V
    7. 6.7  Timing Requirements
    8. 6.8  Typical Characteristics: VS = ±12 V (Full Bias)
    9. 6.9  Typical Characteristics: VS = ±12 V (Mid Bias)
    10. 6.10 Typical Characteristics: VS = ±12 V (Low Bias)
    11. 6.11 Typical Characteristics: VS = ±6 V (Full Bias)
    12. 6.12 Typical Characteristics: VS = ±6 V (Mid Bias)
    13. 6.13 Typical Characteristics: VS = ±6 V (Low Bias)
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Current and Voltage
      2. 7.3.2 Driving Capacitive Loads
      3. 7.3.3 Distortion Performance
      4. 7.3.4 Differential Noise Performance
      5. 7.3.5 DC Accuracy and Offset Control
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Wideband Current-Feedback Operation
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Dual-Supply Downstream Driver
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Line Driver Headroom Requirements
          2. 8.2.2.2.2 Computing Total Driver Power for Line-Driving Applications
    3. 8.3 What To Do and What Not to Do
      1. 8.3.1 What To Do
      2. 8.3.2 What Not to Do
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Wafer and Die Information
    3. 10.3 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Low power consumption:
    • Full-bias mode: 23 mA
    • Mid-bias mode: 17.7 mA
    • Low-bias mode: 12.2 mA
    • Low-power shutdown mode
    • IADJ pin for variable bias
  • Low noise:
    • Voltage noise: 2.7 nV/√Hz
    • Inverting current noise: 17 pA/√Hz
    • Noninverting current noise: 1.2 pA/√Hz
  • Low distortion:
    • –100-dBc HD2 (1-MHz,100-Ω
      differential load)
    • –89-dBc HD3 (1-MHz, 100-Ω differential load)
  • High output current: > 416 mA (25-Ω load)
  • Wide output swing:
    43.2 VPP (±12-V, 100-Ω differential load)
  • Wide bandwidth: 150 MHz (GDIFF = 10 V/V)
  • PSRR: 50 dB at 1 MHz for good isolation
  • Wide power-supply range: 10 V to 28 V
  • Thermal protection: 170°C (typical)
  • Alternative device with wider supply and integrated common-mode buffer: THS6222