SBOS877A April   2018  – September 2018 THS6301

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      MTPR G.Fast 212 MHz (Bias 10, PAR = 15 dB, 1-in-64 Missing Tones)
      2.      Multitone Power Ratio (MTPR) Profile (G.Fast, 212 MHz, 8 dBm)
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Dissipation and Thermal Considerations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The THS6301 is a single-channel, current-feedback architecture, differential line driver that enables G.Fast and different digital subscriber line (DSL) home gateway systems. The device enables
106-MHz and 212-MHz G.Fast digital subscriber line profiles that use native discrete multitone modulation (DMT) signals. The THS6301 functions with high linearity at an 8-dBm line power through 212 MHz.

The unique architecture of this device minimizes quiescent current while providing very high linearity. Internally-fixed bias settings of the amplifier provide power savings for line-driving modes where the full performance of the amplifier is not needed. For further flexibility and power savings, the overall quiescent current is adjustable by a single external bias resistor connected to one of the device pins. The device also features two line-termination modes to maintain impedance matching at very low power consumption.

The device can also be used as a fixed-gain differential amplifier with bandwidth and power-scaling to suit the needs of differential applications.

The device is available in a 4-mm × 4-mm, 16-pin, VQFN package.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
THS6301 VQFN (16) 4.00 mm × 4.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.