SCPS269 September 2017 TIC12400
There are two supply input pins for the TIC12400: VS and VDD. VS is the main power supply for the entire chip and is essential for all critical functions of the device. The TIC12400 is designed to operate with VS ranging from 6.5 V to 35 V. The VDD supply is used to determine the logic level on the SPI communication interface, source the current for the SO driver, and sets the pull-up voltage for the CS pin. It can also be used as a possible external pull-up supply for the /INT pinas an alternative to the VS supply and it shall be connected to a 3 V to 5.5 V logic supply. Removing VDD from the device disables SPI communications, but does not impact normal operation of the device.
To improve stability of the supply inputs, some decoupling capacitors are recommended on the PCB. Figure 87 shows an example on the on-board power supply decoupling scheme. The supply voltage (VSUPPLY) is decoupled on the Electronic Control Unit (ECU) board using a large decoupling capacitor (CBUFF). The diode is installed to prevent damage to the internal system under reversed supply condition. CVS shall be installed closed to the TIC12400 for best decoupling performance. The voltage regulator provides a regulated voltage for the digital potion of the device and for the local microcontroller and its output is decoupled with CDECOUPLE. Table 61 lists recommended values for each individual decoupling capacitor shown in the system diagram.
|CBUFF||100 μF, 50V rated, ±20%|
|CVSUPPLY||100 nF, 50 V rated, ±10%; X7R|
|CVS||100 nF, 50 V rated|
|CDECOUPLE||100 nF ~ 1 μF|