SLVSDQ6A July   2018  – November 2018 TL431LI , TL432LI

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Thermal Information
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Temperature Coefficient
    2. 8.2 Dynamic Impedance
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 Open Loop (Comparator)
      2. 9.4.2 Closed Loop
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Comparator With Integrated Reference
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Basic Operation
            1. 10.2.1.2.1.1 Overdrive
          2. 10.2.1.2.2 Output Voltage and Logic Input Level
            1. 10.2.1.2.2.1 Input Resistance
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Precision Constant Current Sink
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
          1. 10.2.2.2.1 Basic Operation
            1. 10.2.2.2.1.1 Output Current Range and Accuracy
          2. 10.2.2.2.2 Power Consumption
      3. 10.2.3 Shunt Regulator/Reference
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
          1. 10.2.3.2.1 Programming Output/Cathode Voltage
          2. 10.2.3.2.2 Total Accuracy
          3. 10.2.3.2.3 Stability
          4. 10.2.3.2.4 Start-up Time
        3. 10.2.3.3 Application Curve
      4. 10.2.4 Isolated Flyback with Optocoupler
        1. 10.2.4.1 Design Requirements
          1. 10.2.4.1.1 Detailed Design Procedure
            1. 10.2.4.1.1.1 TL431 Feedback Loop Error Calculation
    3. 10.3 System Examples
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Documentation Support
      1. 13.2.1 Device Nomenclature
      2. 13.2.2 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.1.2.2 Output Voltage and Logic Input Level

In order for TL43xLI to properly be used as a comparator, the logic output must be readable by the receiving logic device. This is accomplished by knowing the input high and low level threshold voltage levels, typically denoted by VIH and VIL.

As seen in Figure 21, TL43xLI's output low level voltage in open-loop/comparator mode is approximately 2 V, which is typically sufficient for 5 V supplied logic. However, would not work for 3.3 V and 1.8 V supplied logic. To accommodate this a resistive divider can be tied to the output to attenuate the output voltage to a voltage legible to the receiving low voltage logic device.

TL43xLI's output high voltage is equal to VSUP due to TL43xLI being open-collector. If VSUP is much higher than the receiving logic's maximum input voltage tolerance, the output must be attenuated to accommodate the outgoing logic's reliability.

When using a resistive divider on the output, be sure to make the sum of the resistive divider (R1 and R2 in Figure 20) is much greater than RSUP in order to not interfere with TL43xLI's ability to pull close to VSUP when turning off.