SLVSES2D August   2018  – February 2020 TLV803E , TLV809E , TLV810E

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Timing Diagram
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage (VDD)
      2. 8.3.2 VDD Hysteresis
      3. 8.3.3 VDD Glitch Immunity
      4. 8.3.4 Output Logic
        1. 8.3.4.1 RESET Output, Active Low
        2. 8.3.4.2 RESET Output, Active High
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation (VDD > VDD(min))
      2. 8.4.2 VDD Between VPOR and VDD(min)
      3. 8.4.3 Below Power-On-Reset (VDD < VPOR)
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Support Resources
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Ensured RESET output for VDD = 0.7 V to 6 V
  • Fixed time delay: 40 µs, 10 ms, 50 ms, 100 ms, 200 ms, 400 ms
  • Supply current (IDD): 250 nA (typical)
    • 1 µA (maximum for VDD = 3.3 V)
  • Output topology:
    • TLV809E: push-pull, active low
    • TLV803E: open-drain, active low
    • TLV810E: push-pull, active high
  • Under voltage detection:
    • High accuracy: ±0.5% (typical)
    • Nominal voltage monitor: 3 V, 3.3 V, 5 V
    • (VIT–): 1.7 V, 1.8 V, 1.9 V, 2.4 V, 2.64 V,
      2.93 V, 3.08 V, 4.38 V, 4.63 V
  • Package:
    • SOT23-3 (DBZ) (with pin 1 = GND)
    • SOT23-3 (DBZ) (with pin 1 = RESET)
    • SC-70 (DCK)
  • Temperature range:  –40°C to +125°C
  • Pin-to-pin compatible with MAX803/809/810, APX803/809/810